From: Thierry Reding <thierry.reding@gmail.com>
To: "Li.Xiubo@freescale.com" <Li.Xiubo@freescale.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
"swarren@wwwdotorg.org" <swarren@wwwdotorg.org>,
"galak@codeaurora.org" <galak@codeaurora.org>,
"grant.likely@linaro.org" <grant.likely@linaro.org>,
"matt.porter@linaro.org" <matt.porter@linaro.org>,
"tomasz.figa@gmail.com" <tomasz.figa@gmail.com>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"rob@landley.net" <rob@landley.net>,
"ian.campbell@citrix.com" <ian.campbell@citrix.com>,
Pawel Moll <Pawel.Moll@arm.com>,
"rob.herring@calxeda.com" <rob.herring@calxeda.com>,
"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
"linux-pwm@vger.kernel.org" <linux-pwm@vger.kernel.org>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
Huan Wang <Huan.Wang@freescale.com>,
"jingchang.lu@freescale.com" <jingchang.lu@freescale.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFCv2 endianess 1/4] pwm: Add Freescale FTM PWM driver support
Date: Thu, 12 Dec 2013 13:42:23 +0100 [thread overview]
Message-ID: <20131212124222.GK11524@ulmo.nvidia.com> (raw)
In-Reply-To: <d6985022e8aa4e21b618205ddf521d9f@BY2PR03MB505.namprd03.prod.outlook.com>
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On Thu, Dec 12, 2013 at 02:43:14AM +0000, Li.Xiubo@freescale.com wrote:
> Hi Mark,
>
>
> > > > > +static inline u32 fsl_pwm_readl(struct fsl_pwm_chip *fpc,
> > > > > + const void __iomem *addr)
> > > > > +{
> > > > > + if (likely(fpc->big_endian))
> > > > > + return ioread32be(addr);
> > > > > + else
> > > > > + return readl(addr);
> > > > > +}
> > >
> > > It looks a little odd to to have two different accessors here.
> > >
> > > Could these not be unified somehow?
> > >
> >
> > How about the following :
> >
> > +static inline u32 fsl_pwm_readl(struct fsl_pwm_chip *fpc,
> > + const void __iomem *addr)
> > +{
> > + u32 val;
> > +
> > + if (likely(fpc->big_endian))
> > + val = be32_to_cpu(__raw_readl(addr));
> > + else
> > + val = le32_to_cpu(__raw_readl(addr));
> > +
> > + rmb();
> > +
> > + return val;
> > +}
> > +
> > +static inline void fsl_pwm_writel(struct fsl_pwm_chip *fpc,
> > + u32 val, void __iomem *addr)
> > +{
> > + wmb();
> > +
> > + if (likely(fpc->big_endian))
> > + __raw_writel(cpu_to_be32(val), addr);
> > + else
> > + __raw_writel(cpu_to_le32(val), addr);
> > +}
> > +
> >
> >
>
> Or, will these be much better ?
> +++++++++++
> +static inline u32 fsl_pwm_readl(struct fsl_pwm_chip *fpc,
> + const void __iomem *addr)
> +{
> + u32 val;
> +
> + if (likely(fpc->big_endian))
> + val = be32_to_cpu((__force __be32)__raw_readl(addr));
> + else
> + val = le32_to_cpu((__force __le32)__raw_readl(addr));
> +
> + rmb();
> +
> + return val;
> +}
> +
> +static inline void fsl_pwm_writel(struct fsl_pwm_chip *fpc,
> + u32 val, void __iomem *addr)
> +{
> + wmb();
> +
> + if (likely(fpc->big_endian))
> + __raw_writel((__force u32)cpu_to_be32(val), addr);
> + else
> + __raw_writel((__force u32)cpu_to_le32(val), addr); }
> +
> -----------
I think perhaps what Mark may have meant was something like this:
static inline u32 fsl_pwm_readl(struct fsl_pwm_chip *fpc,
const void __iomem *addr)
{
u32 value = readl(addr);
if (likely(fpc->big_endian))
value = be32_to_cpu(value);
else
value = le32_to_cpu(value);
return value;
}
static inline void fsl_pwm_writel(struct fsl_pwm_chip *fpc, u32 value,
const void __iomem *addr)
{
if (likely(fpc->big_endian))
value = cpu_to_be32(value);
else
value = cpu_to_le32(value);
writel(value, addr);
}
That way you call the accessors only once, and do the conversion after
or before that.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFCv2 endianess 1/4] pwm: Add Freescale FTM PWM driver support
Date: Thu, 12 Dec 2013 13:42:23 +0100 [thread overview]
Message-ID: <20131212124222.GK11524@ulmo.nvidia.com> (raw)
In-Reply-To: <d6985022e8aa4e21b618205ddf521d9f@BY2PR03MB505.namprd03.prod.outlook.com>
On Thu, Dec 12, 2013 at 02:43:14AM +0000, Li.Xiubo at freescale.com wrote:
> Hi Mark,
>
>
> > > > > +static inline u32 fsl_pwm_readl(struct fsl_pwm_chip *fpc,
> > > > > + const void __iomem *addr)
> > > > > +{
> > > > > + if (likely(fpc->big_endian))
> > > > > + return ioread32be(addr);
> > > > > + else
> > > > > + return readl(addr);
> > > > > +}
> > >
> > > It looks a little odd to to have two different accessors here.
> > >
> > > Could these not be unified somehow?
> > >
> >
> > How about the following :
> >
> > +static inline u32 fsl_pwm_readl(struct fsl_pwm_chip *fpc,
> > + const void __iomem *addr)
> > +{
> > + u32 val;
> > +
> > + if (likely(fpc->big_endian))
> > + val = be32_to_cpu(__raw_readl(addr));
> > + else
> > + val = le32_to_cpu(__raw_readl(addr));
> > +
> > + rmb();
> > +
> > + return val;
> > +}
> > +
> > +static inline void fsl_pwm_writel(struct fsl_pwm_chip *fpc,
> > + u32 val, void __iomem *addr)
> > +{
> > + wmb();
> > +
> > + if (likely(fpc->big_endian))
> > + __raw_writel(cpu_to_be32(val), addr);
> > + else
> > + __raw_writel(cpu_to_le32(val), addr);
> > +}
> > +
> >
> >
>
> Or, will these be much better ?
> +++++++++++
> +static inline u32 fsl_pwm_readl(struct fsl_pwm_chip *fpc,
> + const void __iomem *addr)
> +{
> + u32 val;
> +
> + if (likely(fpc->big_endian))
> + val = be32_to_cpu((__force __be32)__raw_readl(addr));
> + else
> + val = le32_to_cpu((__force __le32)__raw_readl(addr));
> +
> + rmb();
> +
> + return val;
> +}
> +
> +static inline void fsl_pwm_writel(struct fsl_pwm_chip *fpc,
> + u32 val, void __iomem *addr)
> +{
> + wmb();
> +
> + if (likely(fpc->big_endian))
> + __raw_writel((__force u32)cpu_to_be32(val), addr);
> + else
> + __raw_writel((__force u32)cpu_to_le32(val), addr); }
> +
> -----------
I think perhaps what Mark may have meant was something like this:
static inline u32 fsl_pwm_readl(struct fsl_pwm_chip *fpc,
const void __iomem *addr)
{
u32 value = readl(addr);
if (likely(fpc->big_endian))
value = be32_to_cpu(value);
else
value = le32_to_cpu(value);
return value;
}
static inline void fsl_pwm_writel(struct fsl_pwm_chip *fpc, u32 value,
const void __iomem *addr)
{
if (likely(fpc->big_endian))
value = cpu_to_be32(value);
else
value = cpu_to_le32(value);
writel(value, addr);
}
That way you call the accessors only once, and do the conversion after
or before that.
Thierry
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next prev parent reply other threads:[~2013-12-12 12:43 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-06 5:52 [RFCv2 endianess 0/4] Add Freescale FTM PWM driver Xiubo Li
2013-12-06 5:52 ` [RFCv2 endianess 1/4] pwm: Add Freescale FTM PWM driver support Xiubo Li
2013-12-10 5:10 ` Li.Xiubo
2013-12-10 5:10 ` Li.Xiubo at freescale.com
2013-12-10 10:19 ` Mark Rutland
2013-12-10 10:19 ` Mark Rutland
2013-12-10 11:37 ` Li.Xiubo
2013-12-10 11:37 ` Li.Xiubo at freescale.com
2013-12-12 2:43 ` Li.Xiubo
2013-12-12 2:43 ` Li.Xiubo at freescale.com
2013-12-12 12:42 ` Thierry Reding [this message]
2013-12-12 12:42 ` Thierry Reding
2013-12-13 9:52 ` Li.Xiubo
2013-12-13 9:52 ` Li.Xiubo at freescale.com
2013-12-06 5:52 ` [RFCv2 endianess 2/4] ARM: dts: Add Freescale FTM PWM node for VF610 Xiubo Li
2013-12-06 5:52 ` [RFCv2 endianess 3/4] ARM: dts: Enables FTM PWM device for Vybrid VF610 TOWER board Xiubo Li
2013-12-06 5:52 ` [RFCv2 endianess 4/4] Documentation: Add device tree bindings for Freescale FTM PWM Xiubo Li
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