From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Subject: Re: [PATCH 5/8] drm/i915: retrieve current fb config
 into new plane_config structure at init v7
Date: Tue, 17 Dec 2013 13:03:06 -0800
Message-ID: <20131217130306.06cb4b09@jbarnes-desktop>
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To: Chris Wilson <chris@chris-wilson.co.uk>
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On Tue, 17 Dec 2013 10:03:12 +0000
Chris Wilson <chris@chris-wilson.co.uk> wrote:

> On Mon, Dec 16, 2013 at 04:34:26PM -0800, Jesse Barnes wrote:
> > +	if (INTEL_INFO(dev)->gen >= 4) {
> > +		if (plane_config->tiled)
> > +			offset = I915_READ(DSPTILEOFF(plane));
> > +		else
> > +			offset = I915_READ(DSPLINOFF(plane));
> > +		base = I915_READ(DSPSURF(plane)) & 0xfffff000;
> > +	} else {
> > +		base = I915_READ(DSPADDR(plane));
> > +	}
> > +
> > +	val = I915_READ(PIPESRC(pipe));
> > +	plane_config->fb->base.width = ((val >> 16) & 0xfff) + 1;
> > +	plane_config->fb->base.height = ((val >> 0) & 0xfff) + 1;
> > +
> > +	val = I915_READ(DSPSTRIDE(pipe));
> > +	plane_config->fb->base.pitches[0] = val & 0xffffff80;
> > +
> > +	plane_config->size = ALIGN(plane_config->fb->base.pitches[0] *
> > +				   plane_config->fb->base.height, PAGE_SIZE);
> 
> This underestimates the size of a tiled framebuffer. Height should be
> aligned to 1,16,64 depending on tiling.

Fixed, thanks.

-- 
Jesse Barnes, Intel Open Source Technology Center