Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram

["Michael S. Tsirkin" <mst@redhat.com>]

On Tue, Dec 17, 2013 at 06:56:06PM +0100, Gerd Hoffmann wrote:
>   Hi,
> 
> > > We need to change the way we reserve the mmconfig space though.  
> > > 
> > > Currently it is marked reserved in the e820 table.  Having that overlap
> > > with the _CRS region makes windows quite unhappy, we tried that
> > > recently.
> > 
> > Yes this also contradicts the spec, see below.
> > 
> > > My laptop has the mmconfig space declared as LPC ressource:
> > > 
> > >             Device (LPC)
> > >             {
> > >                 Name (_ADR, 0x001F0000)  // _ADR: Address
> > >                 Name (_S3D, 0x03)  // _S3D: S3 Device State
> > >                 Name (RID, 0x00)
> > >                 Device (SIO)
> > >                 {
> > >                     Name (_HID, EisaId ("PNP0C02"))
> > >                     Name (_UID, 0x00)  // _UID: Unique ID
> > >                     Name (SCRS, ResourceTemplate ()
> > > [ ... ]
> > >                         Memory32Fixed (ReadWrite,
> > >                             0xF8000000,         // Address Base
> > >                             0x04000000,         // Address Length
> > >                             )
> > > [ ... ]
> > >                     Method (_CRS, 0, NotSerialized)
> > > [ ... return SCRS, with updates applied in some cases ... ]
> > > 
> > > When doing it this way we can simply make the PCI0._CRS cover the whole
> > > end-of-ram -> ioapic-base range, simliar to piix, and we are pretty free
> > > to place the mmconfig xbar anywhere in that area.
> > 
> > The spec says:
> 
> > 	(under \_SB) in a node with a _HID of EISAID (PNP0C02),
> 
> So this is what my laptop does.
> 
> >  and the
> > 	resources in this case
> > 	should not be claimed in the root PCI bus’s _CRS.
> 
> My laptop has them in the root bus _CRS though:
> 
> [    0.124634] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in
> ACPI motherboard resources
> 
> [    0.139391] pci_bus 0000:00: root bus resource [mem
> 0xdfa00000-0xfebfffff]
> 
> >  The resources can
> > 	optionally be returned in
> > 	Int15 E820 or EFIGetMemoryMap as reserved memory but must always be
> > 	reported through
> > 	ACPI as a motherboard resource.
> 
> So we can do both e820 and motherboard ressource.  Good, that hopefully
> simplifies the transition.
> 
> > My reading of the above is that this can be an LPC resource but
> > claiming this as the root's _CRS isn't ok then.
> 
> I read the specs the same way, but my laptop does something different.
> 
> Guess that needs quite some testing to figure which works best ...
> 
> > I merged your patch but split it: q35 is separate and piix
> > is separate. Would you like me to drop the q35 part then?
> 
> If you are fine with q35 having only 2G lowmem keep it.  It's safe.
> 
> We can sort the mmconfig setup afterwards, then check if (and how) we'll
> transition to 3G lowmem.  Maybe we simply don't after all, with the
> world moving to 64bit it doesn't matter that much whenever memory is
> mapped above or below 4g.  And for old 32bit guests there is always the
> option to stick with piix which continues to offers up to 3.5G lowmem.
> 
> cheers,
>   Gerd
> 

I'll think it over, I will keep the patch around but won't merge
to Anthony meanwhile.

-- 
MST