From mboxrd@z Thu Jan 1 00:00:00 1970 From: Aurelien Jarno Subject: Re: [PATCH v2 06/10] target-mips: Set target page size to 16K in KVM mode Date: Sat, 21 Dec 2013 16:34:22 +0100 Message-ID: <20131221153422.GA9265@ohm.rr44.fr> References: <1387203165-5553-1-git-send-email-james.hogan@imgtec.com> <1387203165-5553-7-git-send-email-james.hogan@imgtec.com> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Cc: Paolo Bonzini , Gleb Natapov , qemu-devel@nongnu.org, kvm@vger.kernel.org, Sanjay Lal To: James Hogan Return-path: Content-Disposition: inline In-Reply-To: <1387203165-5553-7-git-send-email-james.hogan@imgtec.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org List-Id: kvm.vger.kernel.org On Mon, Dec 16, 2013 at 02:12:41PM +0000, James Hogan wrote: > From: Sanjay Lal > > With larger set associative caches KVM can open the possibility of cache > aliasing between the memory that QEMU allocates with mmap and the > mapping into the guest address space. Therefore increase the target page > size to 16K when KVM is configured. > > Signed-off-by: Sanjay Lal > Signed-off-by: James Hogan > Cc: Aurelien Jarno > --- > Changes in v2: > - Expand commit message > --- > target-mips/mips-defs.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h > index bf094a3..473ddf8 100644 > --- a/target-mips/mips-defs.h > +++ b/target-mips/mips-defs.h > @@ -5,7 +5,12 @@ > //#define USE_HOST_FLOAT_REGS > > /* Real pages are variable size... */ > +#ifdef CONFIG_KVM > +/* For KVM/MIPS the minimum page size is 16K due to cache aliasing issues */ > +#define TARGET_PAGE_BITS 14 > +#else > #define TARGET_PAGE_BITS 12 > +#endif > #define MIPS_TLB_MAX 128 > > #if defined(TARGET_MIPS64) I am not sure it is something correct. It means that the emulated CPU won't support 4K pages anymore, even when running in TCG mode without KVM. If the kernel maps a 4K page, in practice a 16K page is going to be mapped by the qemu tlb. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40148) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VuOZk-00005W-6U for qemu-devel@nongnu.org; Sat, 21 Dec 2013 10:34:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VuOZe-00038D-5q for qemu-devel@nongnu.org; Sat, 21 Dec 2013 10:34:48 -0500 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:46184) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VuOZd-00034x-Vi for qemu-devel@nongnu.org; Sat, 21 Dec 2013 10:34:42 -0500 Date: Sat, 21 Dec 2013 16:34:22 +0100 From: Aurelien Jarno Message-ID: <20131221153422.GA9265@ohm.rr44.fr> References: <1387203165-5553-1-git-send-email-james.hogan@imgtec.com> <1387203165-5553-7-git-send-email-james.hogan@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1387203165-5553-7-git-send-email-james.hogan@imgtec.com> Subject: Re: [Qemu-devel] [PATCH v2 06/10] target-mips: Set target page size to 16K in KVM mode List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: James Hogan Cc: Paolo Bonzini , Gleb Natapov , qemu-devel@nongnu.org, kvm@vger.kernel.org, Sanjay Lal On Mon, Dec 16, 2013 at 02:12:41PM +0000, James Hogan wrote: > From: Sanjay Lal > > With larger set associative caches KVM can open the possibility of cache > aliasing between the memory that QEMU allocates with mmap and the > mapping into the guest address space. Therefore increase the target page > size to 16K when KVM is configured. > > Signed-off-by: Sanjay Lal > Signed-off-by: James Hogan > Cc: Aurelien Jarno > --- > Changes in v2: > - Expand commit message > --- > target-mips/mips-defs.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h > index bf094a3..473ddf8 100644 > --- a/target-mips/mips-defs.h > +++ b/target-mips/mips-defs.h > @@ -5,7 +5,12 @@ > //#define USE_HOST_FLOAT_REGS > > /* Real pages are variable size... */ > +#ifdef CONFIG_KVM > +/* For KVM/MIPS the minimum page size is 16K due to cache aliasing issues */ > +#define TARGET_PAGE_BITS 14 > +#else > #define TARGET_PAGE_BITS 12 > +#endif > #define MIPS_TLB_MAX 128 > > #if defined(TARGET_MIPS64) I am not sure it is something correct. It means that the emulated CPU won't support 4K pages anymore, even when running in TCG mode without KVM. If the kernel maps a 4K page, in practice a 16K page is going to be mapped by the qemu tlb. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net