From mboxrd@z Thu Jan 1 00:00:00 1970 From: Aravind Gopalakrishnan Subject: Re: [PATCH] x86/AMD: Apply workaround for AMD F16h Erratum792 Date: Wed, 5 Feb 2014 15:22:22 -0600 Message-ID: <20140205212221.GA8837@arav-dinar> References: <1391633972-4433-1-git-send-email-Aravind.Gopalakrishnan@amd.com> <52F2A512.30304@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <52F2A512.30304@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Andrew Cooper Cc: keir@xen.org, suravee.suthikulpanit@amd.com, jbeulich@suse.com, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On Wed, Feb 05, 2014 at 08:54:42PM +0000, Andrew Cooper wrote: > On 05/02/2014 20:59, Aravind Gopalakrishnan wrote: > > unsigned long long value; > > + u32 pci_val; > > Please move this to the scope created by the lower hunk. > Done > > + if (pci_val & 0x1f) { > > + pci_val &= ~(0x1f); > > 0x1f is by default an int, so you use a u suffix to make it u32 to use > as a mask. Brackets are not really needed. > Done > > + } > > + } > > + > > Indentation needs some work. This file derives from Linux so uses tabs > (at 8 spaces wide), rather than the Xen style of 4 spaces. > Done; Sending out changes in V2. Thanks, Aravind.