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diff for duplicates of <20140310122830.GT14976@lee--X1>

diff --git a/a/1.txt b/N1/1.txt
index 5fdd2a3..0fee235 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -3,8 +3,8 @@ On Fri, 07 Mar 2014, Maxime COQUELIN wrote:
 > The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration
 > and 1.5-GHz ARM Cortex-A9 SMP CPU.
 > 
-> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
-> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
+> Signed-off-by: Maxime Coquelin <maxime.coquelin-qxv4g6HH51o@public.gmane.org>
+> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>
 > ---
 >  arch/arm/boot/dts/stih407-clock.dtsi   |  41 +++
 >  arch/arm/boot/dts/stih407-pinctrl.dtsi | 618 +++++++++++++++++++++++++++++++++
@@ -28,7 +28,7 @@ Going to gloss over this, as you and Srini are the platform experts.
 
 s/2013/2014
 
-> + * <stlinux-devel@stlinux.com>
+> + * <stlinux-devel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org>
 
 Might consider submitting a MAINTAINERS entry for all of ST's DTS(I)
 files and removing this from them. Only if this ML is pretty
@@ -63,7 +63,7 @@ stable/constant of course.
 > +		 * Bootloader initialized system infrastructure clock for
 > +		 * serial devices.
 > +		 */
-> +		CLK_EXT2F_A9: clockgenC0 at 13 {
+> +		CLK_EXT2F_A9: clockgenC0@13 {
 
 s/@/@0x
 
@@ -82,7 +82,7 @@ s/@/@0x
 > @@ -0,0 +1,618 @@
 > +/*
 > + * Copyright (C) 2013 STMicroelectronics Limited.
-> + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
+> + * Author: Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>
 > + *
 > + * This program is free software; you can redistribute it and/or modify
 > + * it under the terms of the GNU General Public License version 2 as
@@ -138,7 +138,7 @@ s/@/@0x
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09610000 0x6000>;
 > +
-> +			PIO0: gpio at 09610000 {
+> +			PIO0: gpio@09610000 {
 
 s/@/@0x
 
@@ -152,7 +152,7 @@ propagated throughout the patch.
 > +				reg = <0x0 0x100>;
 > +				st,bank-name = "PIO0";
 > +			};
-> +			PIO1: gpio at 09611000 {
+> +			PIO1: gpio@09611000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -163,7 +163,7 @@ Are there really these big gaps in the register space i.e 0x1100 -> 0x2000 etc?
 
 > +				st,bank-name = "PIO1";
 > +			};
-> +			PIO2: gpio at 09612000 {
+> +			PIO2: gpio@09612000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -171,7 +171,7 @@ Are there really these big gaps in the register space i.e 0x1100 -> 0x2000 etc?
 > +				reg = <0x2000 0x100>;
 > +				st,bank-name = "PIO2";
 > +			};
-> +			PIO3: gpio at 09613000 {
+> +			PIO3: gpio@09613000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -179,7 +179,7 @@ Are there really these big gaps in the register space i.e 0x1100 -> 0x2000 etc?
 > +				reg = <0x3000 0x100>;
 > +				st,bank-name = "PIO3";
 > +			};
-> +			PIO4: gpio at 09614000 {
+> +			PIO4: gpio@09614000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -188,7 +188,7 @@ Are there really these big gaps in the register space i.e 0x1100 -> 0x2000 etc?
 > +				st,bank-name = "PIO4";
 > +			};
 > +
-> +			PIO5: gpio at 09615000 {
+> +			PIO5: gpio@09615000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -364,7 +364,7 @@ Superflous new line.
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09200000 0x10000>;
 > +
-> +			PIO10: PIO at 09200000 {
+> +			PIO10: PIO@09200000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -372,7 +372,7 @@ Superflous new line.
 > +				reg = <0x0 0x100>;
 > +				st,bank-name = "PIO10";
 > +			};
-> +			PIO11: PIO at 09201000 {
+> +			PIO11: PIO@09201000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -380,7 +380,7 @@ Superflous new line.
 > +				reg = <0x1000 0x100>;
 > +				st,bank-name = "PIO11";
 > +			};
-> +			PIO12: PIO at 09202000 {
+> +			PIO12: PIO@09202000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -388,7 +388,7 @@ Superflous new line.
 > +				reg = <0x2000 0x100>;
 > +				st,bank-name = "PIO12";
 > +			};
-> +			PIO13: PIO at 09203000 {
+> +			PIO13: PIO@09203000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -396,7 +396,7 @@ Superflous new line.
 > +				reg = <0x3000 0x100>;
 > +				st,bank-name = "PIO13";
 > +			};
-> +			PIO14: PIO at 09204000 {
+> +			PIO14: PIO@09204000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -404,7 +404,7 @@ Superflous new line.
 > +				reg = <0x4000 0x100>;
 > +				st,bank-name = "PIO14";
 > +			};
-> +			PIO15: PIO at 09205000 {
+> +			PIO15: PIO@09205000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -412,7 +412,7 @@ Superflous new line.
 > +				reg = <0x5000 0x100>;
 > +				st,bank-name = "PIO15";
 > +			};
-> +			PIO16: PIO at 09206000 {
+> +			PIO16: PIO@09206000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -420,7 +420,7 @@ Superflous new line.
 > +				reg = <0x6000 0x100>;
 > +				st,bank-name = "PIO16";
 > +			};
-> +			PIO17: PIO at 09207000 {
+> +			PIO17: PIO@09207000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -428,7 +428,7 @@ Superflous new line.
 > +				reg = <0x7000 0x100>;
 > +				st,bank-name = "PIO17";
 > +			};
-> +			PIO18: PIO at 09208000 {
+> +			PIO18: PIO@09208000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -436,7 +436,7 @@ Superflous new line.
 > +				reg = <0x8000 0x100>;
 > +				st,bank-name = "PIO18";
 > +			};
-> +			PIO19: PIO at 09209000 {
+> +			PIO19: PIO@09209000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -549,7 +549,7 @@ Superflous new line.
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09210000 0x10000>;
 > +
-> +			PIO20: PIO at 09210000 {
+> +			PIO20: PIO@09210000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -570,7 +570,7 @@ Superflous new line.
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09220000 0x6000>;
 > +
-> +			PIO30: gpio at 09220000 {
+> +			PIO30: gpio@09220000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -578,7 +578,7 @@ Superflous new line.
 > +				reg = <0x0 0x100>;
 > +				st,bank-name = "PIO30";
 > +			};
-> +			PIO31: gpio at 09221000 {
+> +			PIO31: gpio@09221000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -586,7 +586,7 @@ Superflous new line.
 > +				reg = <0x1000 0x100>;
 > +				st,bank-name = "PIO31";
 > +			};
-> +			PIO32: gpio at 09222000 {
+> +			PIO32: gpio@09222000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -594,7 +594,7 @@ Superflous new line.
 > +				reg = <0x2000 0x100>;
 > +				st,bank-name = "PIO32";
 > +			};
-> +			PIO33: gpio at 09223000 {
+> +			PIO33: gpio@09223000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -602,7 +602,7 @@ Superflous new line.
 > +				reg = <0x3000 0x100>;
 > +				st,bank-name = "PIO33";
 > +			};
-> +			PIO34: gpio at 09224000 {
+> +			PIO34: gpio@09224000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -610,7 +610,7 @@ Superflous new line.
 > +				reg = <0x4000 0x100>;
 > +				st,bank-name = "PIO34";
 > +			};
-> +			PIO35: gpio at 09225000 {
+> +			PIO35: gpio@09225000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -670,7 +670,7 @@ Extra new line above.
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09230000 0x3000>;
 > +
-> +			PIO40: gpio at 09230000 {
+> +			PIO40: gpio@09230000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -678,7 +678,7 @@ Extra new line above.
 > +				reg = <0 0x100>;
 > +				st,bank-name = "PIO40";
 > +			};
-> +			PIO41: gpio at 09231000 {
+> +			PIO41: gpio@09231000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -686,7 +686,7 @@ Extra new line above.
 > +				reg = <0x1000 0x100>;
 > +				st,bank-name = "PIO41";
 > +			};
-> +			PIO42: gpio at 09232000 {
+> +			PIO42: gpio@09232000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -722,7 +722,7 @@ Extra new line above.
 > @@ -0,0 +1,250 @@
 > +/*
 > + * Copyright (C) 2013 STMicroelectronics Limited.
-> + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
+> + * Author: Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>
 > + *
 > + * This program is free software; you can redistribute it and/or modify
 > + * it under the terms of the GNU General Public License version 2 as
@@ -737,31 +737,31 @@ Extra new line above.
 > +	cpus {
 > +		#address-cells = <1>;
 > +		#size-cells = <0>;
-> +		cpu at 0 {
+> +		cpu@0 {
 > +			device_type = "cpu";
 > +			compatible = "arm,cortex-a9";
 > +			reg = <0>;
 > +		};
-> +		cpu at 1 {
+> +		cpu@1 {
 > +			device_type = "cpu";
 > +			compatible = "arm,cortex-a9";
 > +			reg = <1>;
 > +		};
 > +	};
 > +
-> +	intc: interrupt-controller at 08761000 {
+> +	intc: interrupt-controller@08761000 {
 > +		compatible = "arm,cortex-a9-gic";
 > +		#interrupt-cells = <3>;
 > +		interrupt-controller;
 > +		reg = <0x08761000 0x1000>, <0x08760100 0x100>;
 > +	};
 > +
-> +	scu at 08760000 {
+> +	scu@08760000 {
 > +		compatible = "arm,cortex-a9-scu";
 > +		reg = <0x08760000 0x1000>;
 > +	};
 > +
-> +	timer at 08760200 {
+> +	timer@08760200 {
 > +		interrupt-parent = <&intc>;
 > +		compatible = "arm,cortex-a9-global-timer";
 > +		reg = <0x08760200 0x100>;
@@ -785,7 +785,7 @@ Extra new line above.
 > +		ranges;
 > +		compatible = "simple-bus";
 > +
-> +		syscfg_sbc:sbc-syscfg at 9620000{
+> +		syscfg_sbc:sbc-syscfg@9620000{
 
 Space after colon and another after the address.
 
@@ -795,37 +795,37 @@ Same for all of the nodes below and throughout the patch.
 > +			reg = <0x9620000 0x1000>;
 > +		};
 > +
-> +		syscfg_front:front-syscfg at 9280000{
+> +		syscfg_front:front-syscfg@9280000{
 > +			compatible = "st,stih407-front-syscfg", "syscon";
 > +			reg = <0x9280000 0x1000>;
 > +		};
 > +
-> +		syscfg_rear:rear-syscfg at 9290000{
+> +		syscfg_rear:rear-syscfg@9290000{
 > +			compatible = "st,stih407-rear-syscfg", "syscon";
 > +			reg = <0x9290000 0x1000>;
 > +		};
 > +
-> +		syscfg_flash:flash-syscfg at 92a0000{
+> +		syscfg_flash:flash-syscfg@92a0000{
 > +			compatible = "st,stih407-flash-syscfg", "syscon";
 > +			reg = <0x92a0000 0x1000>;
 > +		};
 > +
-> +		syscfg_sbc_reg:fvdp-lite-syscfg at 9600000{
+> +		syscfg_sbc_reg:fvdp-lite-syscfg@9600000{
 > +			compatible = "st,stih407-sbc-reg-syscfg", "syscon";
 > +			reg = <0x9600000 0x1000>;
 > +		};
 > +
-> +		syscfg_core:core-syscfg at 92b0000{
+> +		syscfg_core:core-syscfg@92b0000{
 > +			compatible = "st,stih407-core-syscfg", "syscon";
 > +			reg = <0x92b0000 0x1000>;
 > +		};
 > +
-> +		syscfg_lpm:lpm-syscfg at 94b5100{
+> +		syscfg_lpm:lpm-syscfg@94b5100{
 > +			compatible = "st,stih407-lpm-syscfg", "syscon";
 > +			reg = <0x94b5100 0x1000>;
 > +		};
 > +
-> +		serial at 9830000{
+> +		serial@9830000{
 > +			compatible = "st,asc";
 > +			status = "disabled";
 
@@ -841,7 +841,7 @@ to the node rather than the device.
 > +		};
 
 Like this:
-	serial at 9830000{
+	serial@9830000{
 		compatible = "st,asc";
 		reg = <0x9830000 0x2c>;
 		interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;
@@ -853,7 +853,7 @@ Like this:
 	};
 
 > +
-> +		serial at 9831000{
+> +		serial@9831000{
 > +			compatible = "st,asc";
 > +			status = "disabled";
 > +			reg = <0x9831000 0x2c>;
@@ -863,7 +863,7 @@ Like this:
 > +			clocks = <&CLK_EXT2F_A9>;
 > +		};
 > +
-> +		serial at 9832000{
+> +		serial@9832000{
 > +			compatible = "st,asc";
 > +			status = "disabled";
 > +			reg = <0x9832000 0x2c>;
@@ -874,7 +874,7 @@ Like this:
 > +		};
 > +
 > +		/* SBC_ASC0 - UART10 */
-> +		sbc_serial0: serial at 9530000 {
+> +		sbc_serial0: serial@9530000 {
 > +			compatible = "st,asc";
 > +			status = "disabled";
 > +			reg = <0x9530000 0x2c>;
@@ -884,7 +884,7 @@ Like this:
 > +			clocks = <&CLK_SYSIN>;
 > +		};
 > +
-> +		serial at 9531000 {
+> +		serial@9531000 {
 > +			compatible = "st,asc";
 > +			status = "disabled";
 > +			reg = <0x9531000 0x2c>;
@@ -894,7 +894,7 @@ Like this:
 > +			clocks = <&CLK_SYSIN>;
 > +		};
 > +
-> +		i2c at 9840000 {
+> +		i2c@9840000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
@@ -906,7 +906,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c0_default>;
 > +		};
 > +
-> +		i2c at 9841000 {
+> +		i2c@9841000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9841000 0x110>;
@@ -918,7 +918,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c1_default>;
 > +		};
 > +
-> +		i2c at 9842000 {
+> +		i2c@9842000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9842000 0x110>;
@@ -930,7 +930,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c2_default>;
 > +		};
 > +
-> +		i2c at 9843000 {
+> +		i2c@9843000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9843000 0x110>;
@@ -942,7 +942,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c3_default>;
 > +		};
 > +
-> +		i2c at 9844000 {
+> +		i2c@9844000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9844000 0x110>;
@@ -954,7 +954,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c4_default>;
 > +		};
 > +
-> +		i2c at 9845000 {
+> +		i2c@9845000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9845000 0x110>;
@@ -968,7 +968,7 @@ Like this:
 > +
 > +
 > +		/* SSCs on SBC */
-> +		i2c at 9540000 {
+> +		i2c@9540000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9540000 0x110>;
@@ -980,7 +980,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c10_default>;
 > +		};
 > +
-> +		i2c at 9541000 {
+> +		i2c@9541000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9541000 0x110>;
@@ -1000,10 +1000,14 @@ misaligned in the submission.
 Wow, this is good work and a lot of code!
 
 Once my comments have been rectified, feel free to add my:
-  Acked-by: Lee Jones <lee.jones@linaro.org> 
+  Acked-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 
 
 -- 
 Lee Jones
 Linaro STMicroelectronics Landing Team Lead
-Linaro.org ? Open source software for ARM SoCs
+Linaro.org │ Open source software for ARM SoCs
 Follow Linaro: Facebook | Twitter | Blog
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 3936dcf..aa45b5b 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,26 @@
  "ref\01394203251-25361-1-git-send-email-maxime.coquelin@st.com\0"
  "ref\01394203251-25361-5-git-send-email-maxime.coquelin@st.com\0"
- "From\0lee.jones@linaro.org (Lee Jones)\0"
- "Subject\0[PATCH v3 4/5] ARM: dts: Add STiH407 SoC support\0"
+ "ref\01394203251-25361-5-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org\0"
+ "From\0Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0"
+ "Subject\0Re: [PATCH v3 4/5] ARM: dts: Add STiH407 SoC support\0"
  "Date\0Mon, 10 Mar 2014 12:28:30 +0000\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Maxime COQUELIN <maxime.coquelin-qxv4g6HH51o@public.gmane.org>\0"
+ "Cc\0Rob Landley <rob-VoJi6FS/r0vR7s880joybQ@public.gmane.org>"
+  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
+  Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>
+  Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
+  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
+  Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+  Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
+  Srinivas Kandagatla <srinivas.kandagatla-qxv4g6HH51o@public.gmane.org>
+  Stuart Menefy <stuart.menefy-qxv4g6HH51o@public.gmane.org>
+  Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
+  Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>
+  linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+ " kernel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "On Fri, 07 Mar 2014, Maxime COQUELIN wrote:\n"
@@ -11,8 +28,8 @@
  "> The STiH407 is advanced multi-HD AVC processor with 3D graphics acceleration\n"
  "> and 1.5-GHz ARM Cortex-A9 SMP CPU.\n"
  "> \n"
- "> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>\n"
- "> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>\n"
+ "> Signed-off-by: Maxime Coquelin <maxime.coquelin-qxv4g6HH51o@public.gmane.org>\n"
+ "> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>\n"
  "> ---\n"
  ">  arch/arm/boot/dts/stih407-clock.dtsi   |  41 +++\n"
  ">  arch/arm/boot/dts/stih407-pinctrl.dtsi | 618 +++++++++++++++++++++++++++++++++\n"
@@ -36,7 +53,7 @@
  "\n"
  "s/2013/2014\n"
  "\n"
- "> + * <stlinux-devel@stlinux.com>\n"
+ "> + * <stlinux-devel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org>\n"
  "\n"
  "Might consider submitting a MAINTAINERS entry for all of ST's DTS(I)\n"
  "files and removing this from them. Only if this ML is pretty\n"
@@ -71,7 +88,7 @@
  "> +\t\t * Bootloader initialized system infrastructure clock for\n"
  "> +\t\t * serial devices.\n"
  "> +\t\t */\n"
- "> +\t\tCLK_EXT2F_A9: clockgenC0 at 13 {\n"
+ "> +\t\tCLK_EXT2F_A9: clockgenC0@13 {\n"
  "\n"
  "s/@/@0x\n"
  "\n"
@@ -90,7 +107,7 @@
  "> @@ -0,0 +1,618 @@\n"
  "> +/*\n"
  "> + * Copyright (C) 2013 STMicroelectronics Limited.\n"
- "> + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>\n"
+ "> + * Author: Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>\n"
  "> + *\n"
  "> + * This program is free software; you can redistribute it and/or modify\n"
  "> + * it under the terms of the GNU General Public License version 2 as\n"
@@ -146,7 +163,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09610000 0x6000>;\n"
  "> +\n"
- "> +\t\t\tPIO0: gpio at 09610000 {\n"
+ "> +\t\t\tPIO0: gpio@09610000 {\n"
  "\n"
  "s/@/@0x\n"
  "\n"
@@ -160,7 +177,7 @@
  "> +\t\t\t\treg = <0x0 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO0\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO1: gpio at 09611000 {\n"
+ "> +\t\t\tPIO1: gpio@09611000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -171,7 +188,7 @@
  "\n"
  "> +\t\t\t\tst,bank-name = \"PIO1\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO2: gpio at 09612000 {\n"
+ "> +\t\t\tPIO2: gpio@09612000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -179,7 +196,7 @@
  "> +\t\t\t\treg = <0x2000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO2\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO3: gpio at 09613000 {\n"
+ "> +\t\t\tPIO3: gpio@09613000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -187,7 +204,7 @@
  "> +\t\t\t\treg = <0x3000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO3\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO4: gpio at 09614000 {\n"
+ "> +\t\t\tPIO4: gpio@09614000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -196,7 +213,7 @@
  "> +\t\t\t\tst,bank-name = \"PIO4\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tPIO5: gpio at 09615000 {\n"
+ "> +\t\t\tPIO5: gpio@09615000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -372,7 +389,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09200000 0x10000>;\n"
  "> +\n"
- "> +\t\t\tPIO10: PIO at 09200000 {\n"
+ "> +\t\t\tPIO10: PIO@09200000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -380,7 +397,7 @@
  "> +\t\t\t\treg = <0x0 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO10\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO11: PIO at 09201000 {\n"
+ "> +\t\t\tPIO11: PIO@09201000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -388,7 +405,7 @@
  "> +\t\t\t\treg = <0x1000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO11\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO12: PIO at 09202000 {\n"
+ "> +\t\t\tPIO12: PIO@09202000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -396,7 +413,7 @@
  "> +\t\t\t\treg = <0x2000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO12\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO13: PIO at 09203000 {\n"
+ "> +\t\t\tPIO13: PIO@09203000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -404,7 +421,7 @@
  "> +\t\t\t\treg = <0x3000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO13\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO14: PIO at 09204000 {\n"
+ "> +\t\t\tPIO14: PIO@09204000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -412,7 +429,7 @@
  "> +\t\t\t\treg = <0x4000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO14\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO15: PIO at 09205000 {\n"
+ "> +\t\t\tPIO15: PIO@09205000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -420,7 +437,7 @@
  "> +\t\t\t\treg = <0x5000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO15\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO16: PIO at 09206000 {\n"
+ "> +\t\t\tPIO16: PIO@09206000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -428,7 +445,7 @@
  "> +\t\t\t\treg = <0x6000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO16\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO17: PIO at 09207000 {\n"
+ "> +\t\t\tPIO17: PIO@09207000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -436,7 +453,7 @@
  "> +\t\t\t\treg = <0x7000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO17\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO18: PIO at 09208000 {\n"
+ "> +\t\t\tPIO18: PIO@09208000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -444,7 +461,7 @@
  "> +\t\t\t\treg = <0x8000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO18\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO19: PIO at 09209000 {\n"
+ "> +\t\t\tPIO19: PIO@09209000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -557,7 +574,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09210000 0x10000>;\n"
  "> +\n"
- "> +\t\t\tPIO20: PIO at 09210000 {\n"
+ "> +\t\t\tPIO20: PIO@09210000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -578,7 +595,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09220000 0x6000>;\n"
  "> +\n"
- "> +\t\t\tPIO30: gpio at 09220000 {\n"
+ "> +\t\t\tPIO30: gpio@09220000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -586,7 +603,7 @@
  "> +\t\t\t\treg = <0x0 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO30\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO31: gpio at 09221000 {\n"
+ "> +\t\t\tPIO31: gpio@09221000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -594,7 +611,7 @@
  "> +\t\t\t\treg = <0x1000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO31\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO32: gpio at 09222000 {\n"
+ "> +\t\t\tPIO32: gpio@09222000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -602,7 +619,7 @@
  "> +\t\t\t\treg = <0x2000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO32\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO33: gpio at 09223000 {\n"
+ "> +\t\t\tPIO33: gpio@09223000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -610,7 +627,7 @@
  "> +\t\t\t\treg = <0x3000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO33\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO34: gpio at 09224000 {\n"
+ "> +\t\t\tPIO34: gpio@09224000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -618,7 +635,7 @@
  "> +\t\t\t\treg = <0x4000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO34\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO35: gpio at 09225000 {\n"
+ "> +\t\t\tPIO35: gpio@09225000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -678,7 +695,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09230000 0x3000>;\n"
  "> +\n"
- "> +\t\t\tPIO40: gpio at 09230000 {\n"
+ "> +\t\t\tPIO40: gpio@09230000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -686,7 +703,7 @@
  "> +\t\t\t\treg = <0 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO40\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO41: gpio at 09231000 {\n"
+ "> +\t\t\tPIO41: gpio@09231000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -694,7 +711,7 @@
  "> +\t\t\t\treg = <0x1000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO41\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO42: gpio at 09232000 {\n"
+ "> +\t\t\tPIO42: gpio@09232000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -730,7 +747,7 @@
  "> @@ -0,0 +1,250 @@\n"
  "> +/*\n"
  "> + * Copyright (C) 2013 STMicroelectronics Limited.\n"
- "> + * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>\n"
+ "> + * Author: Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>\n"
  "> + *\n"
  "> + * This program is free software; you can redistribute it and/or modify\n"
  "> + * it under the terms of the GNU General Public License version 2 as\n"
@@ -745,31 +762,31 @@
  "> +\tcpus {\n"
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <0>;\n"
- "> +\t\tcpu at 0 {\n"
+ "> +\t\tcpu@0 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"arm,cortex-a9\";\n"
  "> +\t\t\treg = <0>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 1 {\n"
+ "> +\t\tcpu@1 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"arm,cortex-a9\";\n"
  "> +\t\t\treg = <1>;\n"
  "> +\t\t};\n"
  "> +\t};\n"
  "> +\n"
- "> +\tintc: interrupt-controller at 08761000 {\n"
+ "> +\tintc: interrupt-controller@08761000 {\n"
  "> +\t\tcompatible = \"arm,cortex-a9-gic\";\n"
  "> +\t\t#interrupt-cells = <3>;\n"
  "> +\t\tinterrupt-controller;\n"
  "> +\t\treg = <0x08761000 0x1000>, <0x08760100 0x100>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tscu at 08760000 {\n"
+ "> +\tscu@08760000 {\n"
  "> +\t\tcompatible = \"arm,cortex-a9-scu\";\n"
  "> +\t\treg = <0x08760000 0x1000>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\ttimer at 08760200 {\n"
+ "> +\ttimer@08760200 {\n"
  "> +\t\tinterrupt-parent = <&intc>;\n"
  "> +\t\tcompatible = \"arm,cortex-a9-global-timer\";\n"
  "> +\t\treg = <0x08760200 0x100>;\n"
@@ -793,7 +810,7 @@
  "> +\t\tranges;\n"
  "> +\t\tcompatible = \"simple-bus\";\n"
  "> +\n"
- "> +\t\tsyscfg_sbc:sbc-syscfg at 9620000{\n"
+ "> +\t\tsyscfg_sbc:sbc-syscfg@9620000{\n"
  "\n"
  "Space after colon and another after the address.\n"
  "\n"
@@ -803,37 +820,37 @@
  "> +\t\t\treg = <0x9620000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_front:front-syscfg at 9280000{\n"
+ "> +\t\tsyscfg_front:front-syscfg@9280000{\n"
  "> +\t\t\tcompatible = \"st,stih407-front-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x9280000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_rear:rear-syscfg at 9290000{\n"
+ "> +\t\tsyscfg_rear:rear-syscfg@9290000{\n"
  "> +\t\t\tcompatible = \"st,stih407-rear-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x9290000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_flash:flash-syscfg at 92a0000{\n"
+ "> +\t\tsyscfg_flash:flash-syscfg@92a0000{\n"
  "> +\t\t\tcompatible = \"st,stih407-flash-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x92a0000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_sbc_reg:fvdp-lite-syscfg at 9600000{\n"
+ "> +\t\tsyscfg_sbc_reg:fvdp-lite-syscfg@9600000{\n"
  "> +\t\t\tcompatible = \"st,stih407-sbc-reg-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x9600000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_core:core-syscfg at 92b0000{\n"
+ "> +\t\tsyscfg_core:core-syscfg@92b0000{\n"
  "> +\t\t\tcompatible = \"st,stih407-core-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x92b0000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_lpm:lpm-syscfg at 94b5100{\n"
+ "> +\t\tsyscfg_lpm:lpm-syscfg@94b5100{\n"
  "> +\t\t\tcompatible = \"st,stih407-lpm-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x94b5100 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tserial at 9830000{\n"
+ "> +\t\tserial@9830000{\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "\n"
@@ -849,7 +866,7 @@
  "> +\t\t};\n"
  "\n"
  "Like this:\n"
- "\tserial at 9830000{\n"
+ "\tserial@9830000{\n"
  "\t\tcompatible = \"st,asc\";\n"
  "\t\treg = <0x9830000 0x2c>;\n"
  "\t\tinterrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;\n"
@@ -861,7 +878,7 @@
  "\t};\n"
  "\n"
  "> +\n"
- "> +\t\tserial at 9831000{\n"
+ "> +\t\tserial@9831000{\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9831000 0x2c>;\n"
@@ -871,7 +888,7 @@
  "> +\t\t\tclocks = <&CLK_EXT2F_A9>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tserial at 9832000{\n"
+ "> +\t\tserial@9832000{\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9832000 0x2c>;\n"
@@ -882,7 +899,7 @@
  "> +\t\t};\n"
  "> +\n"
  "> +\t\t/* SBC_ASC0 - UART10 */\n"
- "> +\t\tsbc_serial0: serial at 9530000 {\n"
+ "> +\t\tsbc_serial0: serial@9530000 {\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9530000 0x2c>;\n"
@@ -892,7 +909,7 @@
  "> +\t\t\tclocks = <&CLK_SYSIN>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tserial at 9531000 {\n"
+ "> +\t\tserial@9531000 {\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9531000 0x2c>;\n"
@@ -902,7 +919,7 @@
  "> +\t\t\tclocks = <&CLK_SYSIN>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9840000 {\n"
+ "> +\t\ti2c@9840000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\tinterrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -914,7 +931,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c0_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9841000 {\n"
+ "> +\t\ti2c@9841000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9841000 0x110>;\n"
@@ -926,7 +943,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c1_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9842000 {\n"
+ "> +\t\ti2c@9842000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9842000 0x110>;\n"
@@ -938,7 +955,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c2_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9843000 {\n"
+ "> +\t\ti2c@9843000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9843000 0x110>;\n"
@@ -950,7 +967,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c3_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9844000 {\n"
+ "> +\t\ti2c@9844000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9844000 0x110>;\n"
@@ -962,7 +979,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c4_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9845000 {\n"
+ "> +\t\ti2c@9845000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9845000 0x110>;\n"
@@ -976,7 +993,7 @@
  "> +\n"
  "> +\n"
  "> +\t\t/* SSCs on SBC */\n"
- "> +\t\ti2c at 9540000 {\n"
+ "> +\t\ti2c@9540000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9540000 0x110>;\n"
@@ -988,7 +1005,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c10_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9541000 {\n"
+ "> +\t\ti2c@9541000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9541000 0x110>;\n"
@@ -1008,12 +1025,16 @@
  "Wow, this is good work and a lot of code!\n"
  "\n"
  "Once my comments have been rectified, feel free to add my:\n"
- "  Acked-by: Lee Jones <lee.jones@linaro.org> \n"
+ "  Acked-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> \n"
  "\n"
  "-- \n"
  "Lee Jones\n"
  "Linaro STMicroelectronics Landing Team Lead\n"
- "Linaro.org ? Open source software for ARM SoCs\n"
- Follow Linaro: Facebook | Twitter | Blog
+ "Linaro.org \342\224\202 Open source software for ARM SoCs\n"
+ "Follow Linaro: Facebook | Twitter | Blog\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-f60c524208df5ec88d192e4e7fe3703ad6056638fdfbcac29e8d042a43bd8f4e
+5276ece66ce8b1e8071f958c95e974fdda3c06b208416da029b096d0b615269a

diff --git a/a/1.txt b/N2/1.txt
index 5fdd2a3..3b0272b 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -63,7 +63,7 @@ stable/constant of course.
 > +		 * Bootloader initialized system infrastructure clock for
 > +		 * serial devices.
 > +		 */
-> +		CLK_EXT2F_A9: clockgenC0 at 13 {
+> +		CLK_EXT2F_A9: clockgenC0@13 {
 
 s/@/@0x
 
@@ -138,7 +138,7 @@ s/@/@0x
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09610000 0x6000>;
 > +
-> +			PIO0: gpio at 09610000 {
+> +			PIO0: gpio@09610000 {
 
 s/@/@0x
 
@@ -152,7 +152,7 @@ propagated throughout the patch.
 > +				reg = <0x0 0x100>;
 > +				st,bank-name = "PIO0";
 > +			};
-> +			PIO1: gpio at 09611000 {
+> +			PIO1: gpio@09611000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -163,7 +163,7 @@ Are there really these big gaps in the register space i.e 0x1100 -> 0x2000 etc?
 
 > +				st,bank-name = "PIO1";
 > +			};
-> +			PIO2: gpio at 09612000 {
+> +			PIO2: gpio@09612000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -171,7 +171,7 @@ Are there really these big gaps in the register space i.e 0x1100 -> 0x2000 etc?
 > +				reg = <0x2000 0x100>;
 > +				st,bank-name = "PIO2";
 > +			};
-> +			PIO3: gpio at 09613000 {
+> +			PIO3: gpio@09613000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -179,7 +179,7 @@ Are there really these big gaps in the register space i.e 0x1100 -> 0x2000 etc?
 > +				reg = <0x3000 0x100>;
 > +				st,bank-name = "PIO3";
 > +			};
-> +			PIO4: gpio at 09614000 {
+> +			PIO4: gpio@09614000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -188,7 +188,7 @@ Are there really these big gaps in the register space i.e 0x1100 -> 0x2000 etc?
 > +				st,bank-name = "PIO4";
 > +			};
 > +
-> +			PIO5: gpio at 09615000 {
+> +			PIO5: gpio@09615000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -364,7 +364,7 @@ Superflous new line.
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09200000 0x10000>;
 > +
-> +			PIO10: PIO at 09200000 {
+> +			PIO10: PIO@09200000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -372,7 +372,7 @@ Superflous new line.
 > +				reg = <0x0 0x100>;
 > +				st,bank-name = "PIO10";
 > +			};
-> +			PIO11: PIO at 09201000 {
+> +			PIO11: PIO@09201000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -380,7 +380,7 @@ Superflous new line.
 > +				reg = <0x1000 0x100>;
 > +				st,bank-name = "PIO11";
 > +			};
-> +			PIO12: PIO at 09202000 {
+> +			PIO12: PIO@09202000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -388,7 +388,7 @@ Superflous new line.
 > +				reg = <0x2000 0x100>;
 > +				st,bank-name = "PIO12";
 > +			};
-> +			PIO13: PIO at 09203000 {
+> +			PIO13: PIO@09203000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -396,7 +396,7 @@ Superflous new line.
 > +				reg = <0x3000 0x100>;
 > +				st,bank-name = "PIO13";
 > +			};
-> +			PIO14: PIO at 09204000 {
+> +			PIO14: PIO@09204000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -404,7 +404,7 @@ Superflous new line.
 > +				reg = <0x4000 0x100>;
 > +				st,bank-name = "PIO14";
 > +			};
-> +			PIO15: PIO at 09205000 {
+> +			PIO15: PIO@09205000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -412,7 +412,7 @@ Superflous new line.
 > +				reg = <0x5000 0x100>;
 > +				st,bank-name = "PIO15";
 > +			};
-> +			PIO16: PIO at 09206000 {
+> +			PIO16: PIO@09206000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -420,7 +420,7 @@ Superflous new line.
 > +				reg = <0x6000 0x100>;
 > +				st,bank-name = "PIO16";
 > +			};
-> +			PIO17: PIO at 09207000 {
+> +			PIO17: PIO@09207000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -428,7 +428,7 @@ Superflous new line.
 > +				reg = <0x7000 0x100>;
 > +				st,bank-name = "PIO17";
 > +			};
-> +			PIO18: PIO at 09208000 {
+> +			PIO18: PIO@09208000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -436,7 +436,7 @@ Superflous new line.
 > +				reg = <0x8000 0x100>;
 > +				st,bank-name = "PIO18";
 > +			};
-> +			PIO19: PIO at 09209000 {
+> +			PIO19: PIO@09209000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -549,7 +549,7 @@ Superflous new line.
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09210000 0x10000>;
 > +
-> +			PIO20: PIO at 09210000 {
+> +			PIO20: PIO@09210000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -570,7 +570,7 @@ Superflous new line.
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09220000 0x6000>;
 > +
-> +			PIO30: gpio at 09220000 {
+> +			PIO30: gpio@09220000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -578,7 +578,7 @@ Superflous new line.
 > +				reg = <0x0 0x100>;
 > +				st,bank-name = "PIO30";
 > +			};
-> +			PIO31: gpio at 09221000 {
+> +			PIO31: gpio@09221000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -586,7 +586,7 @@ Superflous new line.
 > +				reg = <0x1000 0x100>;
 > +				st,bank-name = "PIO31";
 > +			};
-> +			PIO32: gpio at 09222000 {
+> +			PIO32: gpio@09222000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -594,7 +594,7 @@ Superflous new line.
 > +				reg = <0x2000 0x100>;
 > +				st,bank-name = "PIO32";
 > +			};
-> +			PIO33: gpio at 09223000 {
+> +			PIO33: gpio@09223000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -602,7 +602,7 @@ Superflous new line.
 > +				reg = <0x3000 0x100>;
 > +				st,bank-name = "PIO33";
 > +			};
-> +			PIO34: gpio at 09224000 {
+> +			PIO34: gpio@09224000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -610,7 +610,7 @@ Superflous new line.
 > +				reg = <0x4000 0x100>;
 > +				st,bank-name = "PIO34";
 > +			};
-> +			PIO35: gpio at 09225000 {
+> +			PIO35: gpio@09225000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -670,7 +670,7 @@ Extra new line above.
 > +			interrupts-names = "irqmux";
 > +			ranges = <0 0x09230000 0x3000>;
 > +
-> +			PIO40: gpio at 09230000 {
+> +			PIO40: gpio@09230000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -678,7 +678,7 @@ Extra new line above.
 > +				reg = <0 0x100>;
 > +				st,bank-name = "PIO40";
 > +			};
-> +			PIO41: gpio at 09231000 {
+> +			PIO41: gpio@09231000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -686,7 +686,7 @@ Extra new line above.
 > +				reg = <0x1000 0x100>;
 > +				st,bank-name = "PIO41";
 > +			};
-> +			PIO42: gpio at 09232000 {
+> +			PIO42: gpio@09232000 {
 > +				gpio-controller;
 > +				#gpio-cells = <1>;
 > +				interrupt-controller;
@@ -737,31 +737,31 @@ Extra new line above.
 > +	cpus {
 > +		#address-cells = <1>;
 > +		#size-cells = <0>;
-> +		cpu at 0 {
+> +		cpu@0 {
 > +			device_type = "cpu";
 > +			compatible = "arm,cortex-a9";
 > +			reg = <0>;
 > +		};
-> +		cpu at 1 {
+> +		cpu@1 {
 > +			device_type = "cpu";
 > +			compatible = "arm,cortex-a9";
 > +			reg = <1>;
 > +		};
 > +	};
 > +
-> +	intc: interrupt-controller at 08761000 {
+> +	intc: interrupt-controller@08761000 {
 > +		compatible = "arm,cortex-a9-gic";
 > +		#interrupt-cells = <3>;
 > +		interrupt-controller;
 > +		reg = <0x08761000 0x1000>, <0x08760100 0x100>;
 > +	};
 > +
-> +	scu at 08760000 {
+> +	scu@08760000 {
 > +		compatible = "arm,cortex-a9-scu";
 > +		reg = <0x08760000 0x1000>;
 > +	};
 > +
-> +	timer at 08760200 {
+> +	timer@08760200 {
 > +		interrupt-parent = <&intc>;
 > +		compatible = "arm,cortex-a9-global-timer";
 > +		reg = <0x08760200 0x100>;
@@ -785,7 +785,7 @@ Extra new line above.
 > +		ranges;
 > +		compatible = "simple-bus";
 > +
-> +		syscfg_sbc:sbc-syscfg at 9620000{
+> +		syscfg_sbc:sbc-syscfg@9620000{
 
 Space after colon and another after the address.
 
@@ -795,37 +795,37 @@ Same for all of the nodes below and throughout the patch.
 > +			reg = <0x9620000 0x1000>;
 > +		};
 > +
-> +		syscfg_front:front-syscfg at 9280000{
+> +		syscfg_front:front-syscfg@9280000{
 > +			compatible = "st,stih407-front-syscfg", "syscon";
 > +			reg = <0x9280000 0x1000>;
 > +		};
 > +
-> +		syscfg_rear:rear-syscfg at 9290000{
+> +		syscfg_rear:rear-syscfg@9290000{
 > +			compatible = "st,stih407-rear-syscfg", "syscon";
 > +			reg = <0x9290000 0x1000>;
 > +		};
 > +
-> +		syscfg_flash:flash-syscfg at 92a0000{
+> +		syscfg_flash:flash-syscfg@92a0000{
 > +			compatible = "st,stih407-flash-syscfg", "syscon";
 > +			reg = <0x92a0000 0x1000>;
 > +		};
 > +
-> +		syscfg_sbc_reg:fvdp-lite-syscfg at 9600000{
+> +		syscfg_sbc_reg:fvdp-lite-syscfg@9600000{
 > +			compatible = "st,stih407-sbc-reg-syscfg", "syscon";
 > +			reg = <0x9600000 0x1000>;
 > +		};
 > +
-> +		syscfg_core:core-syscfg at 92b0000{
+> +		syscfg_core:core-syscfg@92b0000{
 > +			compatible = "st,stih407-core-syscfg", "syscon";
 > +			reg = <0x92b0000 0x1000>;
 > +		};
 > +
-> +		syscfg_lpm:lpm-syscfg at 94b5100{
+> +		syscfg_lpm:lpm-syscfg@94b5100{
 > +			compatible = "st,stih407-lpm-syscfg", "syscon";
 > +			reg = <0x94b5100 0x1000>;
 > +		};
 > +
-> +		serial at 9830000{
+> +		serial@9830000{
 > +			compatible = "st,asc";
 > +			status = "disabled";
 
@@ -841,7 +841,7 @@ to the node rather than the device.
 > +		};
 
 Like this:
-	serial at 9830000{
+	serial@9830000{
 		compatible = "st,asc";
 		reg = <0x9830000 0x2c>;
 		interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;
@@ -853,7 +853,7 @@ Like this:
 	};
 
 > +
-> +		serial at 9831000{
+> +		serial@9831000{
 > +			compatible = "st,asc";
 > +			status = "disabled";
 > +			reg = <0x9831000 0x2c>;
@@ -863,7 +863,7 @@ Like this:
 > +			clocks = <&CLK_EXT2F_A9>;
 > +		};
 > +
-> +		serial at 9832000{
+> +		serial@9832000{
 > +			compatible = "st,asc";
 > +			status = "disabled";
 > +			reg = <0x9832000 0x2c>;
@@ -874,7 +874,7 @@ Like this:
 > +		};
 > +
 > +		/* SBC_ASC0 - UART10 */
-> +		sbc_serial0: serial at 9530000 {
+> +		sbc_serial0: serial@9530000 {
 > +			compatible = "st,asc";
 > +			status = "disabled";
 > +			reg = <0x9530000 0x2c>;
@@ -884,7 +884,7 @@ Like this:
 > +			clocks = <&CLK_SYSIN>;
 > +		};
 > +
-> +		serial at 9531000 {
+> +		serial@9531000 {
 > +			compatible = "st,asc";
 > +			status = "disabled";
 > +			reg = <0x9531000 0x2c>;
@@ -894,7 +894,7 @@ Like this:
 > +			clocks = <&CLK_SYSIN>;
 > +		};
 > +
-> +		i2c at 9840000 {
+> +		i2c@9840000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
@@ -906,7 +906,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c0_default>;
 > +		};
 > +
-> +		i2c at 9841000 {
+> +		i2c@9841000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9841000 0x110>;
@@ -918,7 +918,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c1_default>;
 > +		};
 > +
-> +		i2c at 9842000 {
+> +		i2c@9842000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9842000 0x110>;
@@ -930,7 +930,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c2_default>;
 > +		};
 > +
-> +		i2c at 9843000 {
+> +		i2c@9843000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9843000 0x110>;
@@ -942,7 +942,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c3_default>;
 > +		};
 > +
-> +		i2c at 9844000 {
+> +		i2c@9844000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9844000 0x110>;
@@ -954,7 +954,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c4_default>;
 > +		};
 > +
-> +		i2c at 9845000 {
+> +		i2c@9845000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9845000 0x110>;
@@ -968,7 +968,7 @@ Like this:
 > +
 > +
 > +		/* SSCs on SBC */
-> +		i2c at 9540000 {
+> +		i2c@9540000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9540000 0x110>;
@@ -980,7 +980,7 @@ Like this:
 > +			pinctrl-0 = <&pinctrl_i2c10_default>;
 > +		};
 > +
-> +		i2c at 9541000 {
+> +		i2c@9541000 {
 > +			compatible = "st,comms-ssc4-i2c";
 > +			status = "disabled";
 > +			reg = <0x9541000 0x110>;
@@ -1005,5 +1005,5 @@ Once my comments have been rectified, feel free to add my:
 -- 
 Lee Jones
 Linaro STMicroelectronics Landing Team Lead
-Linaro.org ? Open source software for ARM SoCs
+Linaro.org │ Open source software for ARM SoCs
 Follow Linaro: Facebook | Twitter | Blog
diff --git a/a/content_digest b/N2/content_digest
index 3936dcf..afec585 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,9 +1,25 @@
  "ref\01394203251-25361-1-git-send-email-maxime.coquelin@st.com\0"
  "ref\01394203251-25361-5-git-send-email-maxime.coquelin@st.com\0"
- "From\0lee.jones@linaro.org (Lee Jones)\0"
- "Subject\0[PATCH v3 4/5] ARM: dts: Add STiH407 SoC support\0"
+ "From\0Lee Jones <lee.jones@linaro.org>\0"
+ "Subject\0Re: [PATCH v3 4/5] ARM: dts: Add STiH407 SoC support\0"
  "Date\0Mon, 10 Mar 2014 12:28:30 +0000\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Maxime COQUELIN <maxime.coquelin@st.com>\0"
+ "Cc\0Rob Landley <rob@landley.net>"
+  Rob Herring <robh+dt@kernel.org>
+  Pawel Moll <pawel.moll@arm.com>
+  Mark Rutland <mark.rutland@arm.com>
+  Ian Campbell <ijc+devicetree@hellion.org.uk>
+  Kumar Gala <galak@codeaurora.org>
+  Russell King <linux@arm.linux.org.uk>
+  Srinivas Kandagatla <srinivas.kandagatla@st.com>
+  Stuart Menefy <stuart.menefy@st.com>
+  Linus Walleij <linus.walleij@linaro.org>
+  Giuseppe Cavallaro <peppe.cavallaro@st.com>
+  linux-doc@vger.kernel.org
+  linux-kernel@vger.kernel.org
+  devicetree@vger.kernel.org
+  linux-arm-kernel@lists.infradead.org
+ " kernel@stlinux.com\0"
  "\00:1\0"
  "b\0"
  "On Fri, 07 Mar 2014, Maxime COQUELIN wrote:\n"
@@ -71,7 +87,7 @@
  "> +\t\t * Bootloader initialized system infrastructure clock for\n"
  "> +\t\t * serial devices.\n"
  "> +\t\t */\n"
- "> +\t\tCLK_EXT2F_A9: clockgenC0 at 13 {\n"
+ "> +\t\tCLK_EXT2F_A9: clockgenC0@13 {\n"
  "\n"
  "s/@/@0x\n"
  "\n"
@@ -146,7 +162,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09610000 0x6000>;\n"
  "> +\n"
- "> +\t\t\tPIO0: gpio at 09610000 {\n"
+ "> +\t\t\tPIO0: gpio@09610000 {\n"
  "\n"
  "s/@/@0x\n"
  "\n"
@@ -160,7 +176,7 @@
  "> +\t\t\t\treg = <0x0 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO0\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO1: gpio at 09611000 {\n"
+ "> +\t\t\tPIO1: gpio@09611000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -171,7 +187,7 @@
  "\n"
  "> +\t\t\t\tst,bank-name = \"PIO1\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO2: gpio at 09612000 {\n"
+ "> +\t\t\tPIO2: gpio@09612000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -179,7 +195,7 @@
  "> +\t\t\t\treg = <0x2000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO2\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO3: gpio at 09613000 {\n"
+ "> +\t\t\tPIO3: gpio@09613000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -187,7 +203,7 @@
  "> +\t\t\t\treg = <0x3000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO3\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO4: gpio at 09614000 {\n"
+ "> +\t\t\tPIO4: gpio@09614000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -196,7 +212,7 @@
  "> +\t\t\t\tst,bank-name = \"PIO4\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tPIO5: gpio at 09615000 {\n"
+ "> +\t\t\tPIO5: gpio@09615000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -372,7 +388,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09200000 0x10000>;\n"
  "> +\n"
- "> +\t\t\tPIO10: PIO at 09200000 {\n"
+ "> +\t\t\tPIO10: PIO@09200000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -380,7 +396,7 @@
  "> +\t\t\t\treg = <0x0 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO10\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO11: PIO at 09201000 {\n"
+ "> +\t\t\tPIO11: PIO@09201000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -388,7 +404,7 @@
  "> +\t\t\t\treg = <0x1000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO11\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO12: PIO at 09202000 {\n"
+ "> +\t\t\tPIO12: PIO@09202000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -396,7 +412,7 @@
  "> +\t\t\t\treg = <0x2000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO12\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO13: PIO at 09203000 {\n"
+ "> +\t\t\tPIO13: PIO@09203000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -404,7 +420,7 @@
  "> +\t\t\t\treg = <0x3000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO13\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO14: PIO at 09204000 {\n"
+ "> +\t\t\tPIO14: PIO@09204000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -412,7 +428,7 @@
  "> +\t\t\t\treg = <0x4000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO14\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO15: PIO at 09205000 {\n"
+ "> +\t\t\tPIO15: PIO@09205000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -420,7 +436,7 @@
  "> +\t\t\t\treg = <0x5000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO15\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO16: PIO at 09206000 {\n"
+ "> +\t\t\tPIO16: PIO@09206000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -428,7 +444,7 @@
  "> +\t\t\t\treg = <0x6000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO16\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO17: PIO at 09207000 {\n"
+ "> +\t\t\tPIO17: PIO@09207000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -436,7 +452,7 @@
  "> +\t\t\t\treg = <0x7000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO17\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO18: PIO at 09208000 {\n"
+ "> +\t\t\tPIO18: PIO@09208000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -444,7 +460,7 @@
  "> +\t\t\t\treg = <0x8000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO18\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO19: PIO at 09209000 {\n"
+ "> +\t\t\tPIO19: PIO@09209000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -557,7 +573,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09210000 0x10000>;\n"
  "> +\n"
- "> +\t\t\tPIO20: PIO at 09210000 {\n"
+ "> +\t\t\tPIO20: PIO@09210000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -578,7 +594,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09220000 0x6000>;\n"
  "> +\n"
- "> +\t\t\tPIO30: gpio at 09220000 {\n"
+ "> +\t\t\tPIO30: gpio@09220000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -586,7 +602,7 @@
  "> +\t\t\t\treg = <0x0 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO30\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO31: gpio at 09221000 {\n"
+ "> +\t\t\tPIO31: gpio@09221000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -594,7 +610,7 @@
  "> +\t\t\t\treg = <0x1000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO31\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO32: gpio at 09222000 {\n"
+ "> +\t\t\tPIO32: gpio@09222000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -602,7 +618,7 @@
  "> +\t\t\t\treg = <0x2000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO32\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO33: gpio at 09223000 {\n"
+ "> +\t\t\tPIO33: gpio@09223000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -610,7 +626,7 @@
  "> +\t\t\t\treg = <0x3000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO33\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO34: gpio at 09224000 {\n"
+ "> +\t\t\tPIO34: gpio@09224000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -618,7 +634,7 @@
  "> +\t\t\t\treg = <0x4000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO34\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO35: gpio at 09225000 {\n"
+ "> +\t\t\tPIO35: gpio@09225000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -678,7 +694,7 @@
  "> +\t\t\tinterrupts-names = \"irqmux\";\n"
  "> +\t\t\tranges = <0 0x09230000 0x3000>;\n"
  "> +\n"
- "> +\t\t\tPIO40: gpio at 09230000 {\n"
+ "> +\t\t\tPIO40: gpio@09230000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -686,7 +702,7 @@
  "> +\t\t\t\treg = <0 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO40\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO41: gpio at 09231000 {\n"
+ "> +\t\t\tPIO41: gpio@09231000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -694,7 +710,7 @@
  "> +\t\t\t\treg = <0x1000 0x100>;\n"
  "> +\t\t\t\tst,bank-name = \"PIO41\";\n"
  "> +\t\t\t};\n"
- "> +\t\t\tPIO42: gpio at 09232000 {\n"
+ "> +\t\t\tPIO42: gpio@09232000 {\n"
  "> +\t\t\t\tgpio-controller;\n"
  "> +\t\t\t\t#gpio-cells = <1>;\n"
  "> +\t\t\t\tinterrupt-controller;\n"
@@ -745,31 +761,31 @@
  "> +\tcpus {\n"
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <0>;\n"
- "> +\t\tcpu at 0 {\n"
+ "> +\t\tcpu@0 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"arm,cortex-a9\";\n"
  "> +\t\t\treg = <0>;\n"
  "> +\t\t};\n"
- "> +\t\tcpu at 1 {\n"
+ "> +\t\tcpu@1 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"arm,cortex-a9\";\n"
  "> +\t\t\treg = <1>;\n"
  "> +\t\t};\n"
  "> +\t};\n"
  "> +\n"
- "> +\tintc: interrupt-controller at 08761000 {\n"
+ "> +\tintc: interrupt-controller@08761000 {\n"
  "> +\t\tcompatible = \"arm,cortex-a9-gic\";\n"
  "> +\t\t#interrupt-cells = <3>;\n"
  "> +\t\tinterrupt-controller;\n"
  "> +\t\treg = <0x08761000 0x1000>, <0x08760100 0x100>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tscu at 08760000 {\n"
+ "> +\tscu@08760000 {\n"
  "> +\t\tcompatible = \"arm,cortex-a9-scu\";\n"
  "> +\t\treg = <0x08760000 0x1000>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\ttimer at 08760200 {\n"
+ "> +\ttimer@08760200 {\n"
  "> +\t\tinterrupt-parent = <&intc>;\n"
  "> +\t\tcompatible = \"arm,cortex-a9-global-timer\";\n"
  "> +\t\treg = <0x08760200 0x100>;\n"
@@ -793,7 +809,7 @@
  "> +\t\tranges;\n"
  "> +\t\tcompatible = \"simple-bus\";\n"
  "> +\n"
- "> +\t\tsyscfg_sbc:sbc-syscfg at 9620000{\n"
+ "> +\t\tsyscfg_sbc:sbc-syscfg@9620000{\n"
  "\n"
  "Space after colon and another after the address.\n"
  "\n"
@@ -803,37 +819,37 @@
  "> +\t\t\treg = <0x9620000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_front:front-syscfg at 9280000{\n"
+ "> +\t\tsyscfg_front:front-syscfg@9280000{\n"
  "> +\t\t\tcompatible = \"st,stih407-front-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x9280000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_rear:rear-syscfg at 9290000{\n"
+ "> +\t\tsyscfg_rear:rear-syscfg@9290000{\n"
  "> +\t\t\tcompatible = \"st,stih407-rear-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x9290000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_flash:flash-syscfg at 92a0000{\n"
+ "> +\t\tsyscfg_flash:flash-syscfg@92a0000{\n"
  "> +\t\t\tcompatible = \"st,stih407-flash-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x92a0000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_sbc_reg:fvdp-lite-syscfg at 9600000{\n"
+ "> +\t\tsyscfg_sbc_reg:fvdp-lite-syscfg@9600000{\n"
  "> +\t\t\tcompatible = \"st,stih407-sbc-reg-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x9600000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_core:core-syscfg at 92b0000{\n"
+ "> +\t\tsyscfg_core:core-syscfg@92b0000{\n"
  "> +\t\t\tcompatible = \"st,stih407-core-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x92b0000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tsyscfg_lpm:lpm-syscfg at 94b5100{\n"
+ "> +\t\tsyscfg_lpm:lpm-syscfg@94b5100{\n"
  "> +\t\t\tcompatible = \"st,stih407-lpm-syscfg\", \"syscon\";\n"
  "> +\t\t\treg = <0x94b5100 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tserial at 9830000{\n"
+ "> +\t\tserial@9830000{\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "\n"
@@ -849,7 +865,7 @@
  "> +\t\t};\n"
  "\n"
  "Like this:\n"
- "\tserial at 9830000{\n"
+ "\tserial@9830000{\n"
  "\t\tcompatible = \"st,asc\";\n"
  "\t\treg = <0x9830000 0x2c>;\n"
  "\t\tinterrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;\n"
@@ -861,7 +877,7 @@
  "\t};\n"
  "\n"
  "> +\n"
- "> +\t\tserial at 9831000{\n"
+ "> +\t\tserial@9831000{\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9831000 0x2c>;\n"
@@ -871,7 +887,7 @@
  "> +\t\t\tclocks = <&CLK_EXT2F_A9>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tserial at 9832000{\n"
+ "> +\t\tserial@9832000{\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9832000 0x2c>;\n"
@@ -882,7 +898,7 @@
  "> +\t\t};\n"
  "> +\n"
  "> +\t\t/* SBC_ASC0 - UART10 */\n"
- "> +\t\tsbc_serial0: serial at 9530000 {\n"
+ "> +\t\tsbc_serial0: serial@9530000 {\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9530000 0x2c>;\n"
@@ -892,7 +908,7 @@
  "> +\t\t\tclocks = <&CLK_SYSIN>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tserial at 9531000 {\n"
+ "> +\t\tserial@9531000 {\n"
  "> +\t\t\tcompatible = \"st,asc\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9531000 0x2c>;\n"
@@ -902,7 +918,7 @@
  "> +\t\t\tclocks = <&CLK_SYSIN>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9840000 {\n"
+ "> +\t\ti2c@9840000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\tinterrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -914,7 +930,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c0_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9841000 {\n"
+ "> +\t\ti2c@9841000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9841000 0x110>;\n"
@@ -926,7 +942,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c1_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9842000 {\n"
+ "> +\t\ti2c@9842000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9842000 0x110>;\n"
@@ -938,7 +954,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c2_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9843000 {\n"
+ "> +\t\ti2c@9843000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9843000 0x110>;\n"
@@ -950,7 +966,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c3_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9844000 {\n"
+ "> +\t\ti2c@9844000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9844000 0x110>;\n"
@@ -962,7 +978,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c4_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9845000 {\n"
+ "> +\t\ti2c@9845000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9845000 0x110>;\n"
@@ -976,7 +992,7 @@
  "> +\n"
  "> +\n"
  "> +\t\t/* SSCs on SBC */\n"
- "> +\t\ti2c at 9540000 {\n"
+ "> +\t\ti2c@9540000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9540000 0x110>;\n"
@@ -988,7 +1004,7 @@
  "> +\t\t\tpinctrl-0 = <&pinctrl_i2c10_default>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ti2c at 9541000 {\n"
+ "> +\t\ti2c@9541000 {\n"
  "> +\t\t\tcompatible = \"st,comms-ssc4-i2c\";\n"
  "> +\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\treg = <0x9541000 0x110>;\n"
@@ -1013,7 +1029,7 @@
  "-- \n"
  "Lee Jones\n"
  "Linaro STMicroelectronics Landing Team Lead\n"
- "Linaro.org ? Open source software for ARM SoCs\n"
+ "Linaro.org \342\224\202 Open source software for ARM SoCs\n"
  Follow Linaro: Facebook | Twitter | Blog
 
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+ad3e98057e232a7eaea3be636cb31a9a00f1b61d36b649f8f3b2f8eed569a0b2

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