Re: problem booting with Micron MT29F8G08ABABAWP ...

[Sascha Hauer <s.hauer@pengutronix.de>]

On Fri, Mar 14, 2014 at 02:45:05PM -0400, raespi wrote:
> Hello again ... diving through the drivers/mtd/nand/nand_base.c code
> I managed to boot with this little modification in the
> nand_flash_detect_onfi() function just before exiting from it:
> 
>     if ( mtd->oobsize > 128 )
>       mtd->oobsize = 128;
> 
> Apparently the only allowed oobsizes are 8, 16, 64 and 128 according
> to the nand_scan_ident() function.

You're probably referring to this code:

	/*
	 * If no default placement scheme is given, select an
	 * appropriate one.
	 */
	if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) {
		switch (mtd->oobsize) {
		case 8:
			chip->ecc.layout = &nand_oob_8;
			break;
		case 16:
			chip->ecc.layout = &nand_oob_16;
			break;
		case 64:
			chip->ecc.layout = &nand_oob_64;
			break;
		case 128:
			chip->ecc.layout = &nand_oob_128;
			break;
		default:
			pr_warn("No oob scheme defined for oobsize %d\n",
				   mtd->oobsize);
			BUG();
		}
	}

This check is only executed when you haven't specified an ecc layout in
your chip driver. You probably have to set chip->ecc.layout in your
driver.

For problems like this it often helps to compare it to the kernel code
(provided it works there). The code is quite similar.

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox