From: Ralf Baechle <ralf@linux-mips.org>
To: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org, blogic@openwrt.org, macro@linux-mips.org
Subject: Re: [PATCH 1/2] MIPS: add MIPS_L1_CACHE_SHIFT_2
Date: Mon, 24 Mar 2014 15:12:59 +0100 [thread overview]
Message-ID: <20140324141259.GL17197@linux-mips.org> (raw)
In-Reply-To: <1390327294-2618-1-git-send-email-florian@openwrt.org>
On Tue, Jan 21, 2014 at 10:01:33AM -0800, Florian Fainelli wrote:
> Some older machines such as the DECStation use a L1 data-cache shift of
> 2 (value of 4), add a Kconfig symbol for this value so they can express
> this requirement.
Older DECstations got R2000/R3000 processors which have 16 byte cache
lines. So a cache shift value of 4 would appear to be right. Maciej?
Ralf
next prev parent reply other threads:[~2014-03-24 14:17 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-21 18:01 [PATCH 1/2] MIPS: add MIPS_L1_CACHE_SHIFT_2 Florian Fainelli
2014-01-21 18:01 ` Florian Fainelli
2014-01-21 18:01 ` [PATCH 2/2] MIPS: fix DECStation build for L1_CACHE_SHIFT value Florian Fainelli
2014-01-21 18:01 ` Florian Fainelli
2014-03-23 2:16 ` Maciej W. Rozycki
2014-03-23 19:01 ` Florian Fainelli
2014-04-01 0:06 ` Maciej W. Rozycki
2014-06-01 8:31 ` Maciej W. Rozycki
2014-03-24 14:12 ` Ralf Baechle [this message]
2014-03-24 16:20 ` [PATCH 1/2] MIPS: add MIPS_L1_CACHE_SHIFT_2 Maciej W. Rozycki
2014-03-24 16:44 ` Florian Fainelli
2014-04-01 0:05 ` Maciej W. Rozycki
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