From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Make contexts non-snooped on non-LLC platforms
Date: Tue, 1 Apr 2014 13:37:54 +0300 [thread overview]
Message-ID: <20140401103754.GC21652@intel.com> (raw)
In-Reply-To: <20140401101919.GJ7314@nuc-i3427.alporthouse.com>
On Tue, Apr 01, 2014 at 11:19:19AM +0100, Chris Wilson wrote:
> On Tue, Apr 01, 2014 at 01:11:02PM +0300, Ville Syrjälä wrote:
> > On Mon, Mar 31, 2014 at 04:39:37PM +0100, Chris Wilson wrote:
> > > On Mon, Mar 31, 2014 at 06:09:49PM +0300, ville.syrjala@linux.intel.com wrote:
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > >
> > > > We don't do CPU access to GPU contexts so making the GPU access snoop
> > > > the CPU caches seems silly, and potentially expensive.
> > > >
> > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > Maybe define a macro to be HAS_L3_CACHE?
> >
> > What should I do with such a macro?
>
> I am trying to express what exactly we are testing for here. It is not
> exactly LLC we care about, but L3 to hide the context switch latency.
> Even though Ben thinks that's a waste of our limited resources.
VLV has L3 too, but we can't control it via the PTEs.
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2014-04-01 10:39 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-31 15:09 [PATCH] drm/i915: Make contexts non-snooped on non-LLC platforms ville.syrjala
2014-03-31 15:39 ` Chris Wilson
2014-04-01 10:11 ` Ville Syrjälä
2014-04-01 10:19 ` Chris Wilson
2014-04-01 10:37 ` Ville Syrjälä [this message]
2014-04-04 13:36 ` [PATCH v2] " ville.syrjala
2014-04-04 13:41 ` Chris Wilson
2014-04-04 16:00 ` Daniel Vetter
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