From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: vlv: reserve the GT power context only once during driver init Date: Tue, 1 Apr 2014 20:11:22 +0300 Message-ID: <20140401171122.GJ21652@intel.com> References: <1396267844-9235-1-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 2FC656E7CC for ; Tue, 1 Apr 2014 10:40:39 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1396267844-9235-1-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Imre Deak Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Mar 31, 2014 at 03:10:44PM +0300, Imre Deak wrote: > Atm we reserve/allocate and free the power context during GT power > enable/disable time. There is no need to do this, we can reserve/allocate > the buffer once during driver loading and free it during driver cleanup. > The re-reservation can also fail in case the driver previously manages to > allocate something on the given fixed address. > = > The buffer isn't exepected to move even if allocated by the BIOS, for > safety add an assert to check this assumption. > = > This also fixed a bug for Ville, where re-reserving the context failed > during a GPU reset (I assume because something else got allocated on its > fixed address). I'm assuming it was the already existing pctx allocation that caused the warning. We just call intel_enable_gt_powersave() again during GPU reset w/o having called intel_disable_gt_powersave() anywhere. So no danger of clobbering the pctx AFAICS, but getting a WARN on every GPU reset is rather annoying. > = > Tested-by: Ville Syrj=E4l=E4 > Signed-off-by: Imre Deak The patch looks good to me. Reviewed-by: Ville Syrj=E4l=E4 -- = Ville Syrj=E4l=E4 Intel OTC