All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
	Ben Widawsky <benjamin.widawsky@intel.com>,
	Intel GFX <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: Invariably invalidate before ctx switch
Date: Thu, 3 Apr 2014 13:21:38 +0300	[thread overview]
Message-ID: <20140403102138.GT21652@intel.com> (raw)
In-Reply-To: <20140403070535.GJ5602@nuc-i3427.alporthouse.com>

On Thu, Apr 03, 2014 at 08:05:35AM +0100, Chris Wilson wrote:
> On Wed, Apr 02, 2014 at 10:30:23PM -0700, Ben Widawsky wrote:
> > We have been setting the bit which was originally BIOS dependent since:
> > commit f05bb0c7b624252a5e768287e340e8e45df96e42
> > Author: Chris Wilson <chris@chris-wilson.co.uk>
> > Date:   Sun Jan 20 16:33:32 2013 +0000
> > 
> >     drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for scanline waits
> > 
> > Therefore, we do not need to try to figure it out dynamically and we can
> > just always invalidate the TLBs.
> > 
> > It's a partial revert of:
> > commit 12b0286f49947a6cdc9285032d918466a8c3f5f9
> > Author: Ben Widawsky <ben@bwidawsk.net>
> > Date:   Mon Jun 4 14:42:50 2012 -0700
> > 
> >     drm/i915: possibly invalidate TLB before context switch
> > 
> > The original commit attempted to only invalidate when necessary
> > (very much a relic from the old days). Now, we can just always invalidate.
> > 
> > I guess the old TODO still exists. Since we seem to have abandoned ILK
> > contexts however, there isn't much point in even remembering.
> > 
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> 
> Seems reasonable, except in most cases (execbuffer) there will be
> a following cache-invalidate as part of the move-to-gpu.

Except we still move_to_gpu() before the context switch. My fbc related
patch to change that order never got merged.

> 
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> 
> ILK ctx, never forget.
> -Chris
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC

  parent reply	other threads:[~2014-04-03 10:21 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-03  5:30 [PATCH] drm/i915: Invariably invalidate before ctx switch Ben Widawsky
2014-04-03  7:05 ` Chris Wilson
2014-04-03  9:42   ` Daniel Vetter
2014-04-03 10:21   ` Ville Syrjälä [this message]
2014-04-03 15:28     ` Daniel Vetter
2014-04-04 11:46       ` Ville Syrjälä

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20140403102138.GT21652@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=benjamin.widawsky@intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.