From: shawn.guo@linaro.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: L2 cache suspend/resume
Date: Sun, 6 Apr 2014 20:19:46 +0800 [thread overview]
Message-ID: <20140406121944.GE24260@dragon> (raw)
In-Reply-To: <20140406114652.GQ7528@n2100.arm.linux.org.uk>
On Sun, Apr 06, 2014 at 12:46:52PM +0100, Russell King - ARM Linux wrote:
> > For imx, the L2 power and therefore the memory array is retained in
> > suspend. We do not want to call outer_disable() to have these data
> > flushed, and need to restore L2 controller before MMU is enabled.
>
> Okay, any objection then to separating out the L2 resume code into an
> early L2 resume helper in arch/arm/mm ?
Move platform code into core is always a nice thing for platform
maintainers, so no objection from me :)
Shawn
next prev parent reply other threads:[~2014-04-06 12:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-05 11:27 L2 cache suspend/resume Russell King - ARM Linux
2014-04-06 11:40 ` Shawn Guo
2014-04-06 11:46 ` Russell King - ARM Linux
2014-04-06 12:19 ` Shawn Guo [this message]
2014-04-07 15:35 ` Stephen Warren
2014-04-08 2:46 ` Joseph Lo
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