From: Will Deacon <will.deacon@arm.com>
To: Pranith Kumar <bobby.prani@gmail.com>
Cc: Catalin Marinas <Catalin.Marinas@arm.com>,
Joe Perches <joe@perches.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH 1/1] prefetch result in 64 bit atomic ops
Date: Tue, 15 Apr 2014 08:52:20 +0100 [thread overview]
Message-ID: <20140415075220.GC17408@arm.com> (raw)
In-Reply-To: <534C2CC2.9050706@gmail.com>
Hi Pranith,
On Mon, Apr 14, 2014 at 07:45:22PM +0100, Pranith Kumar wrote:
> Please disregard previous patches. This is the correct one.
>
> prefetch destination as is being done in ARM32 atomic ops
Whilst this looks like a potentially sensible optimisation (based on the
results I saw on AArch32), I don't think we can take this patch without some
benchmarks on real silicon. The interaction between the half-barrier atomic
instructions and prfm isn't immediately obvious to me, and we should also
consider looking at streaming preload vs the l1keep option.
Did you write this patch as a basic port of the arch/arm/ patches I wrote,
or was it based on performance figures from real hardware?
Will
next prev parent reply other threads:[~2014-04-15 7:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-14 18:45 [RFC PATCH 1/1] prefetch result in 64 bit atomic ops Pranith Kumar
2014-04-15 7:52 ` Will Deacon [this message]
2014-04-15 8:33 ` Joe Perches
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