diff for duplicates of <20140427195527.GC9315@gmail.com> diff --git a/a/1.txt b/N1/1.txt index ab335d0..a62aa4a 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -527,3 +527,9 @@ index 1437b7d..bae17bb 100644 #endif -- 1.9.0 + +-- +To unsubscribe, send a message with 'unsubscribe linux-mm' in +the body to majordomo@kvack.org. For more info on Linux MM, +see: http://www.linux-mm.org/ . +Don't email: <a href=mailto:"dont@kvack.org"> email@kvack.org </a> diff --git a/a/content_digest b/N1/content_digest index 2091246..a858151 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -551,6 +551,12 @@ " }\n" " #endif\n" "-- \n" - 1.9.0 + "1.9.0\n" + "\n" + "--\n" + "To unsubscribe, send a message with 'unsubscribe linux-mm' in\n" + "the body to majordomo@kvack.org. For more info on Linux MM,\n" + "see: http://www.linux-mm.org/ .\n" + "Don't email: <a href=mailto:\"dont@kvack.org\"> email@kvack.org </a>" -442963f0675f5e426be606b8f027b0f1aabe760ee269a1cf10b615e5be83a763 +3fc8e042f90d9cd34c504c72b0148d5104e8ff92db8d9f038660114ad7c367cc
diff --git a/a/1.txt b/N2/1.txt index ab335d0..1744a2d 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -399,7 +399,7 @@ On Sat, Apr 26, 2014 at 11:31:11PM -0400, Jerome Glisse wrote: > > > Kernel driver in use: snd_hda_intel > > > > > > -> > > Grüße, +> > > Grusse, > > > Thomas > > Thomas can you provide output of lspci -t @@ -407,123 +407,8 @@ On Sat, Apr 26, 2014 at 11:31:11PM -0400, Jerome Glisse wrote: > Also did you had a chance to test my ugly patch ? > > Cheers, -> Jérôme +> Jerome If my ugly patch works does this quirk also work ? --- ->From 4a2ed6114cd774e502bab24515988fa1d8366762 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?J=C3=A9r=C3=B4me=20Glisse?= <jglisse@redhat.com> -Date: Sun, 27 Apr 2014 15:48:57 -0400 -Subject: [PATCH] pci: quirk for pci bridge behind hypertransport link with - 32bits addressing. -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It seems some PCI or PCIE bridge are behind HyperTransport that do not -support 64bits addressing but only 32bit (even though the HyperTransport -specification state that it should 40bit at least). This patch add a -quirk that walk the parent chain of a device before setting the dma mask -so that any dma allocation/mapping will fit inside the limit of any -HyperTransport link that might be in front of the PCI/PCIE root complex. - -Signed-off-by: Jérôme Glisse <jglisse@redhat.com> ---- - drivers/pci/quirks.c | 36 ++++++++++++++++++++++++++++++++++++ - include/asm-generic/pci-dma-compat.h | 26 ++++++++++++++++++++++++++ - 2 files changed, 62 insertions(+) - -diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c -index e729206..373ae05 100644 ---- a/drivers/pci/quirks.c -+++ b/drivers/pci/quirks.c -@@ -2447,6 +2447,42 @@ out: - pci_dev_put(host_bridge); - } - -+#define PCI_HT_LCTR_64B 0x8000 /* 64-bit Addressing Enable */ -+ -+u64 pci_ht_quirk_dma_32bit_only(struct pci_dev *dev, u64 mask) -+{ -+ struct pci_bus *bus = dev->bus; -+ -+ do { -+ struct pci_dev *bridge = bus->self; -+ int pos; -+ -+ pos = pci_find_ht_capability(bridge, HT_CAPTYPE_SLAVE); -+ if (pos) { -+ int ctrl_off; -+ u16 flags, ctrl; -+ -+ /* See hypertransport specification about master host -+ * (section 7.5.3.2 in HTC200393). -+ */ -+ pci_read_config_word(dev, pos + PCI_CAP_FLAGS, &flags); -+ ctrl_off = ((flags >> 10) & 1) ? -+ PCI_HT_CAP_SLAVE_CTRL0 : PCI_HT_CAP_SLAVE_CTRL1; -+ pci_read_config_word(dev, pos + ctrl_off, &ctrl); -+ if (!(ctrl & PCI_HT_LCTR_64B)) { -+ /* So 32bits only. Maybe there is one more bug -+ * as HyperTransport specification says that it -+ * should be 40bits. -+ */ -+ return 0xffffffff; -+ } -+ } -+ bus = bus->parent; -+ } while (bus); -+ return mask; -+} -+EXPORT_SYMBOL(pci_ht_quirk_dma_32bit_only); -+ - static void ht_disable_msi_mapping(struct pci_dev *dev) - { - int pos, ttl = 48; -diff --git a/include/asm-generic/pci-dma-compat.h b/include/asm-generic/pci-dma-compat.h -index 1437b7d..bae17bb 100644 ---- a/include/asm-generic/pci-dma-compat.h -+++ b/include/asm-generic/pci-dma-compat.h -@@ -102,13 +102,39 @@ pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr) - } - - #ifdef CONFIG_PCI -+ -+#ifdef CONFIG_PCI_QUIRKS -+u64 pci_ht_quirk_dma_32bit_only(struct pci_dev *dev, u64 mask); -+#else -+static inline u64 pci_ht_quirk_dma_32bit_only(struct pci_dev *dev, u64 mask) -+{ -+ return mask; -+} -+#endif -+ - static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) - { -+ /* We are living in a monstruous world in which you can have the pci -+ * root complex behind an hypertransport link which can not address -+ * anything above 32bit (well hypertransport specification says 40bits -+ * but hardware such as SIS761 only support 32bits). -+ * -+ * So if a device set a mask bigger than 32bit walk the chain of its -+ * parent to see if any is behind a transportlink and if so check that -+ * the transport link support 64bits. -+ */ -+ if (mask & (1ULL << 32ULL)) { -+ mask = pci_ht_quirk_dma_32bit_only(dev, mask); -+ } - return dma_set_mask(&dev->dev, mask); - } - - static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) - { -+ /* See comment in pci_set_dma_mask */ -+ if (mask & (1ULL << 32ULL)) { -+ mask = pci_ht_quirk_dma_32bit_only(dev, mask); -+ } - return dma_set_coherent_mask(&dev->dev, mask); - } - #endif --- -1.9.0 +-- diff --git a/a/content_digest b/N2/content_digest index 2091246..732e0a3 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -424,7 +424,7 @@ "> > > Kernel driver in use: snd_hda_intel\n" "> > > \n" "> > > \n" - "> > > Gr\303\274\303\237e,\n" + "> > > Grusse,\n" "> > > Thomas\n" "> \n" "> Thomas can you provide output of lspci -t\n" @@ -432,125 +432,10 @@ "> Also did you had a chance to test my ugly patch ?\n" "> \n" "> Cheers,\n" - "> J\303\251r\303\264me\n" + "> Jerome\n" "\n" "If my ugly patch works does this quirk also work ?\n" "\n" - "-- \n" - ">From 4a2ed6114cd774e502bab24515988fa1d8366762 Mon Sep 17 00:00:00 2001\n" - "From: =?UTF-8?q?J=C3=A9r=C3=B4me=20Glisse?= <jglisse@redhat.com>\n" - "Date: Sun, 27 Apr 2014 15:48:57 -0400\n" - "Subject: [PATCH] pci: quirk for pci bridge behind hypertransport link with\n" - " 32bits addressing.\n" - "MIME-Version: 1.0\n" - "Content-Type: text/plain; charset=UTF-8\n" - "Content-Transfer-Encoding: 8bit\n" - "\n" - "It seems some PCI or PCIE bridge are behind HyperTransport that do not\n" - "support 64bits addressing but only 32bit (even though the HyperTransport\n" - "specification state that it should 40bit at least). This patch add a\n" - "quirk that walk the parent chain of a device before setting the dma mask\n" - "so that any dma allocation/mapping will fit inside the limit of any\n" - "HyperTransport link that might be in front of the PCI/PCIE root complex.\n" - "\n" - "Signed-off-by: J\303\251r\303\264me Glisse <jglisse@redhat.com>\n" - "---\n" - " drivers/pci/quirks.c | 36 ++++++++++++++++++++++++++++++++++++\n" - " include/asm-generic/pci-dma-compat.h | 26 ++++++++++++++++++++++++++\n" - " 2 files changed, 62 insertions(+)\n" - "\n" - "diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c\n" - "index e729206..373ae05 100644\n" - "--- a/drivers/pci/quirks.c\n" - "+++ b/drivers/pci/quirks.c\n" - "@@ -2447,6 +2447,42 @@ out:\n" - " \tpci_dev_put(host_bridge);\n" - " }\n" - " \n" - "+#define PCI_HT_LCTR_64B\t0x8000\t/* 64-bit Addressing Enable */\n" - "+\n" - "+u64 pci_ht_quirk_dma_32bit_only(struct pci_dev *dev, u64 mask)\n" - "+{\n" - "+\tstruct pci_bus *bus = dev->bus;\n" - "+\n" - "+\tdo {\n" - "+\t\tstruct pci_dev *bridge = bus->self;\n" - "+\t\tint pos;\n" - "+\n" - "+\t\tpos = pci_find_ht_capability(bridge, HT_CAPTYPE_SLAVE);\n" - "+\t\tif (pos) {\n" - "+\t\t\tint ctrl_off;\n" - "+\t\t\tu16 flags, ctrl;\n" - "+\n" - "+\t\t\t/* See hypertransport specification about master host\n" - "+\t\t\t * (section 7.5.3.2 in HTC200393).\n" - "+\t\t\t */\n" - "+\t\t\tpci_read_config_word(dev, pos + PCI_CAP_FLAGS, &flags);\n" - "+\t\t\tctrl_off = ((flags >> 10) & 1) ?\n" - "+\t\t\t\tPCI_HT_CAP_SLAVE_CTRL0 : PCI_HT_CAP_SLAVE_CTRL1;\n" - "+\t\t\tpci_read_config_word(dev, pos + ctrl_off, &ctrl);\n" - "+\t\t\tif (!(ctrl & PCI_HT_LCTR_64B)) {\n" - "+\t\t\t\t/* So 32bits only. Maybe there is one more bug\n" - "+\t\t\t\t * as HyperTransport specification says that it\n" - "+\t\t\t\t * should be 40bits.\n" - "+\t\t\t\t */\n" - "+\t\t\t\treturn 0xffffffff;\n" - "+\t\t\t}\n" - "+\t\t}\n" - "+\t\tbus = bus->parent;\n" - "+\t} while (bus);\n" - "+\treturn mask;\n" - "+}\n" - "+EXPORT_SYMBOL(pci_ht_quirk_dma_32bit_only);\n" - "+\n" - " static void ht_disable_msi_mapping(struct pci_dev *dev)\n" - " {\n" - " \tint pos, ttl = 48;\n" - "diff --git a/include/asm-generic/pci-dma-compat.h b/include/asm-generic/pci-dma-compat.h\n" - "index 1437b7d..bae17bb 100644\n" - "--- a/include/asm-generic/pci-dma-compat.h\n" - "+++ b/include/asm-generic/pci-dma-compat.h\n" - "@@ -102,13 +102,39 @@ pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr)\n" - " }\n" - " \n" - " #ifdef CONFIG_PCI\n" - "+\n" - "+#ifdef CONFIG_PCI_QUIRKS\n" - "+u64 pci_ht_quirk_dma_32bit_only(struct pci_dev *dev, u64 mask);\n" - "+#else\n" - "+static inline u64 pci_ht_quirk_dma_32bit_only(struct pci_dev *dev, u64 mask)\n" - "+{\n" - "+\treturn mask;\n" - "+}\n" - "+#endif\n" - "+\n" - " static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)\n" - " {\n" - "+\t/* We are living in a monstruous world in which you can have the pci\n" - "+\t * root complex behind an hypertransport link which can not address\n" - "+\t * anything above 32bit (well hypertransport specification says 40bits\n" - "+\t * but hardware such as SIS761 only support 32bits).\n" - "+\t *\n" - "+\t * So if a device set a mask bigger than 32bit walk the chain of its\n" - "+\t * parent to see if any is behind a transportlink and if so check that\n" - "+\t * the transport link support 64bits.\n" - "+\t */\n" - "+\tif (mask & (1ULL << 32ULL)) {\n" - "+\t\tmask = pci_ht_quirk_dma_32bit_only(dev, mask);\n" - "+\t}\n" - " \treturn dma_set_mask(&dev->dev, mask);\n" - " }\n" - " \n" - " static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)\n" - " {\n" - "+\t/* See comment in pci_set_dma_mask */\n" - "+\tif (mask & (1ULL << 32ULL)) {\n" - "+\t\tmask = pci_ht_quirk_dma_32bit_only(dev, mask);\n" - "+\t}\n" - " \treturn dma_set_coherent_mask(&dev->dev, mask);\n" - " }\n" - " #endif\n" - "-- \n" - 1.9.0 + -- -442963f0675f5e426be606b8f027b0f1aabe760ee269a1cf10b615e5be83a763 +61ca56215ff38f53dc4f0d5fb31762f22f8cf3cc64a8ec9ab614f13386bf0d86
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