From mboxrd@z Thu Jan 1 00:00:00 1970 From: Richard Cochran Subject: Re: [PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync Date: Mon, 28 Apr 2014 09:55:31 +0200 Message-ID: <20140428075530.GA8371@netboy> References: <1398658225-25873-1-git-send-email-george.cherian@ti.com> <1398658225-25873-5-git-send-email-george.cherian@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1398658225-25873-5-git-send-email-george.cherian-l0cyMroinI0@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: George Cherian Cc: netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org, jeffrey.t.kirsher-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, dborkman-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, ast-uqk4Ao+rVK5Wk0Htik3J/w@public.gmane.org, tklauser-93Khv+1bN0NyDzI6CaY1VQ@public.gmane.org, mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org, bhutchings-s/n/eUQHGBpZroRs9YW3xA@public.gmane.org, zonque-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, balbi-l0cyMroinI0@public.gmane.org, mugunthanvnm-l0cyMroinI0@public.gmane.org, t-kristo-l0cyMroinI0@public.gmane.org, mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org, bcousson-rdvid1DuHRBWk0Htik3J/w@public.gmane.org List-Id: linux-omap@vger.kernel.org On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote: > Enable the Annex F Time Sync explicitly for DRA7x and AM4372. > With this enabled the L2 PTP is working. L2 works fine without this bit. If this is needed for V3 hardware, then it should have its own code variant. > while at that rename TS_BIT8 to TS_TTL_NONZERO Is this bit finally documented for am335x? Thanks, Richard -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: richardcochran@gmail.com (Richard Cochran) Date: Mon, 28 Apr 2014 09:55:31 +0200 Subject: [PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync In-Reply-To: <1398658225-25873-5-git-send-email-george.cherian@ti.com> References: <1398658225-25873-1-git-send-email-george.cherian@ti.com> <1398658225-25873-5-git-send-email-george.cherian@ti.com> Message-ID: <20140428075530.GA8371@netboy> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote: > Enable the Annex F Time Sync explicitly for DRA7x and AM4372. > With this enabled the L2 PTP is working. L2 works fine without this bit. If this is needed for V3 hardware, then it should have its own code variant. > while at that rename TS_BIT8 to TS_TTL_NONZERO Is this bit finally documented for am335x? Thanks, Richard From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753490AbaD1Hzw (ORCPT ); Mon, 28 Apr 2014 03:55:52 -0400 Received: from mail-ee0-f43.google.com ([74.125.83.43]:61909 "EHLO mail-ee0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751200AbaD1Hzs (ORCPT ); Mon, 28 Apr 2014 03:55:48 -0400 Date: Mon, 28 Apr 2014 09:55:31 +0200 From: Richard Cochran To: George Cherian Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-omap@vger.kernel.org, davem@davemloft.net, jeffrey.t.kirsher@intel.com, dborkman@redhat.com, ast@plumgrid.com, tklauser@distanz.ch, mpa@pengutronix.de, bhutchings@solarflare.com, zonque@gmail.com, balbi@ti.com, mugunthanvnm@ti.com, t-kristo@ti.com, mturquette@linaro.org, linux@arm.linux.org.uk, galak@codeaurora.org, ijc+devicetree@hellion.org.uk, mark.rutland@arm.com, pawel.moll@arm.com, robh+dt@kernel.org, tony@atomide.com, bcousson@baylibre.com Subject: Re: [PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync Message-ID: <20140428075530.GA8371@netboy> References: <1398658225-25873-1-git-send-email-george.cherian@ti.com> <1398658225-25873-5-git-send-email-george.cherian@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1398658225-25873-5-git-send-email-george.cherian@ti.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote: > Enable the Annex F Time Sync explicitly for DRA7x and AM4372. > With this enabled the L2 PTP is working. L2 works fine without this bit. If this is needed for V3 hardware, then it should have its own code variant. > while at that rename TS_BIT8 to TS_TTL_NONZERO Is this bit finally documented for am335x? Thanks, Richard