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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v4 0/9] drm/i915: Atomic sprites v4
Date: Tue, 29 Apr 2014 13:44:51 +0300	[thread overview]
Message-ID: <20140429104451.GB18465@intel.com> (raw)
In-Reply-To: <1398767752-619-1-git-send-email-ville.syrjala@linux.intel.com>

On Tue, Apr 29, 2014 at 01:35:43PM +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Another posting of the atomic sprite series. Most things are reviewed, but there
> are a few patches in there for the scanline fixup that don't have r-bs.
> 
> The HSW+ situation is also still unclear. The scanline counter behaviour depends
> on either the actual DDI port used (A vs. rest) or the encoder type (HDMI vs. DP).
> If someone wants to help me find out which, grab [1] and run the resulting
> intel_poller tool to figure out at which scanline the vblank irq triggers and/or
> live surface address gets updated.

And naturally I forgot to specify [1]:
git://gitorious.org/vsyrjala/intel-gpu-tools.git intel_poller

> 
> Examples from running the tool on my IVB:
> 
> # intel_poller -t iir -p 0 -b 0
> ...
> dsl / pipe A / DEIIR[0] (pch):   1078 -   1079
> 
> This tells me that the pipe A vblank bit in DEIIR is set when the scanline
> counter increments from 1078 to 1079. The display mode was 1920x1080, so this
> tells us we need a +1 adjustment for the scaline counter.
> 
> # intel_poller -t surflive -p 0
> ...
> dsl / pipe A / Surflive:   1078 -   1079
> 
> which tells me that SURFLIVE updates at the same time, as was expected.
> 
> You can also run these tests:
> # ./intel_poller -t flip -p 0 -l 1078
> # ./intel_poller -t pan -p 0 -l 1078
> 
> These write the DSPSURF/OFFSET register when the scanline counter reaches the target
> value, and overwrite it again with the original value on the next scanline. If the
> target scanline is correctly set the picture remains shifted for the duration
> of the test, and if you specify any another scanline the picture should remain in
> its original position the whole time.
> 
> So if someone can run these on HSW and BDW systems with both DP and HDMI outputs
> on various ports we can try to figure out what the actual rule is.
> 
> Ville Syrjälä (9):
>   drm/i915: Fix scanout position for real
>   drm/i915: Add intel_get_crtc_scanline()
>   drm/i915: Make sprite updates atomic
>   drm/i915: Perform primary enable/disable atomically with sprite
>     updates
>   drm/i915: Add pipe update trace points
>   drm/i915: Add a small adjustment to the pixel counter on interlaced
>     modes
>   drm/i915: Improve gen3/4 frame counter
>   drm/i915: Draw a picture about video timings
>   drm/i915: Fix gen2 and hsw scanline counter
> 
>  drivers/gpu/drm/i915/i915_irq.c      | 231 +++++++++++++++++++++--------------
>  drivers/gpu/drm/i915/i915_trace.h    |  75 ++++++++++++
>  drivers/gpu/drm/i915/intel_display.c |  50 +++++++-
>  drivers/gpu/drm/i915/intel_drv.h     |   5 +
>  drivers/gpu/drm/i915/intel_sprite.c  | 231 +++++++++++++++++++++++++++++------
>  5 files changed, 463 insertions(+), 129 deletions(-)
> 
> -- 
> 1.8.3.2

-- 
Ville Syrjälä
Intel OTC

      parent reply	other threads:[~2014-04-29 10:45 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-29 10:35 [PATCH v4 0/9] drm/i915: Atomic sprites v4 ville.syrjala
2014-04-29 10:35 ` [PATCH 1/9] drm/i915: Fix scanout position for real ville.syrjala
2014-04-29 10:35 ` [PATCH v4 2/9] drm/i915: Add intel_get_crtc_scanline() ville.syrjala
2014-04-29 10:35 ` [PATCH v8 3/9] drm/i915: Make sprite updates atomic ville.syrjala
     [not found]   ` <CAHofq8MHrbki1XtXeMZGSDSABnu4LUkZDfbYWCvU5Nng0AjM5g@mail.gmail.com>
     [not found]     ` <E1F41119A09A1C4EACAB7A4603D2A6C918F9F47E@BGSMSX104.gar.corp.intel.com>
2014-05-19 10:38       ` FW: " Arun Murthy
2014-05-19 10:49         ` Ville Syrjälä
2014-05-19 11:08           ` Arun Murthy
2014-05-19 10:49     ` Murthy, Arun R
2014-05-19 10:57   ` G, Pallavi
2014-05-22 13:03   ` Daniel Vetter
2014-05-22 13:24     ` Ville Syrjälä
2014-04-29 10:35 ` [PATCH v2 4/9] drm/i915: Perform primary enable/disable atomically with sprite updates ville.syrjala
2014-05-19 10:13   ` G, Pallavi
2014-04-29 10:35 ` [PATCH v4 5/9] drm/i915: Add pipe update trace points ville.syrjala
2014-04-29 11:17   ` Daniel Vetter
2014-04-29 11:46     ` Ville Syrjälä
2014-04-29 10:35 ` [PATCH 6/9] drm/i915: Add a small adjustment to the pixel counter on interlaced modes ville.syrjala
2014-05-15 14:53   ` akash goel
2014-05-16  2:42     ` sourab gupta
2014-05-16 10:49     ` Ville Syrjälä
2014-04-29 10:35 ` [PATCH 7/9] drm/i915: Improve gen3/4 frame counter ville.syrjala
2014-05-15 14:46   ` akash goel
2014-05-16  2:37     ` sourab gupta
2014-04-29 10:35 ` [PATCH v2 8/9] drm/i915: Draw a picture about video timings ville.syrjala
2014-05-15 15:10   ` akash goel
2014-05-15 17:20   ` [PATCH v3 " ville.syrjala
2014-05-16  2:54     ` sourab gupta
2014-04-29 10:35 ` [PATCH 9/9] drm/i915: Fix gen2 and hsw scanline counter ville.syrjala
2014-05-15 17:23   ` [PATCH v2 9/9] drm/i915: Fix gen2 and hsw+ " ville.syrjala
2014-05-16  5:33     ` akash goel
2014-05-16  6:24       ` sourab gupta
2014-05-21  9:01         ` Ville Syrjälä
2014-04-29 10:44 ` Ville Syrjälä [this message]

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