All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <20140430122946.GM29462@lee--X1>

diff --git a/a/1.txt b/N1/1.txt
index 51c1f9c..5f0c162 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -9,11 +9,11 @@
 > >
 > >Documenation says:
 > >
-> >  "The soft reset bit has to be reset to ‘0’ to de-assert the soft
+> >  "The soft reset bit has to be reset to ?0? to de-assert the soft
 > >   reset. The soft reset bit is expected to be asserted for at least
 > >   one clock cycle for proper reset"
 > >
-> That’s the hardware way of saying that 'enable the clock before applying reset'.
+> That?s the hardware way of saying that 'enable the clock before applying reset'.
 > Clock is required to propagate reset-logic to flip-flops in pipeline, which do not get direct reset.
 > 
 > However that apart. You may safely drop udelay(1) because this 'udelay' is at
@@ -27,5 +27,5 @@ reason - and as you rightly say, the delay is pretty small.
 -- 
 Lee Jones
 Linaro STMicroelectronics Landing Team Lead
-Linaro.org │ Open source software for ARM SoCs
+Linaro.org ? Open source software for ARM SoCs
 Follow Linaro: Facebook | Twitter | Blog
diff --git a/a/content_digest b/N1/content_digest
index 1f88e3c..2b5be99 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -3,19 +3,10 @@
  "ref\020980858CB6D3A4BAE95CA194937D5E73EAB5CB7@DBDE04.ent.ti.com\0"
  "ref\020140430102244.GK29462@lee--X1\0"
  "ref\020980858CB6D3A4BAE95CA194937D5E73EAC6A35@DBDE04.ent.ti.com\0"
- "From\0Lee Jones <lee.jones@linaro.org>\0"
- "Subject\0Re: [RFC 07/47] mtd: nand: stm_nand_bch: initialise the BCH Controller\0"
+ "From\0lee.jones@linaro.org (Lee Jones)\0"
+ "Subject\0[RFC 07/47] mtd: nand: stm_nand_bch: initialise the BCH Controller\0"
  "Date\0Wed, 30 Apr 2014 13:29:46 +0100\0"
- "To\0Gupta"
- " Pekon <pekon@ti.com>\0"
- "Cc\0angus.clark@st.com <angus.clark@st.com>"
-  kernel@stlinux.com <kernel@stlinux.com>
-  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
-  linux-mtd@lists.infradead.org <linux-mtd@lists.infradead.org>
- " Ezequiel Garcia \\(ezequiel.garcia@free-electrons.com\\) <ezequiel.garcia@free-electrons.com>"
-  computersforpeace@gmail.com <computersforpeace@gmail.com>
-  dwmw2@infradead.org <dwmw2@infradead.org>
- " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "> >> >+\t/* Reset and disable boot-mode controller */\n"
@@ -29,11 +20,11 @@
  "> >\n"
  "> >Documenation says:\n"
  "> >\n"
- "> >  \"The soft reset bit has to be reset to \342\200\2300\342\200\231 to de-assert the soft\n"
+ "> >  \"The soft reset bit has to be reset to ?0? to de-assert the soft\n"
  "> >   reset. The soft reset bit is expected to be asserted for at least\n"
  "> >   one clock cycle for proper reset\"\n"
  "> >\n"
- "> That\342\200\231s the hardware way of saying that 'enable the clock before applying reset'.\n"
+ "> That?s the hardware way of saying that 'enable the clock before applying reset'.\n"
  "> Clock is required to propagate reset-logic to flip-flops in pipeline, which do not get direct reset.\n"
  "> \n"
  "> However that apart. You may safely drop udelay(1) because this 'udelay' is at\n"
@@ -47,7 +38,7 @@
  "-- \n"
  "Lee Jones\n"
  "Linaro STMicroelectronics Landing Team Lead\n"
- "Linaro.org \342\224\202 Open source software for ARM SoCs\n"
+ "Linaro.org ? Open source software for ARM SoCs\n"
  Follow Linaro: Facebook | Twitter | Blog
 
-e7d25329ab28443ee2a197854788d3ec9f8c906d5a30e0605a9e5e8b1f983789
+2095553425d1504a5cedb5a84a729a2ebcede631f59fc07eaf7ce8731d89e9a3

diff --git a/a/content_digest b/N2/content_digest
index 1f88e3c..be8dc6a 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -8,14 +8,14 @@
  "Date\0Wed, 30 Apr 2014 13:29:46 +0100\0"
  "To\0Gupta"
  " Pekon <pekon@ti.com>\0"
- "Cc\0angus.clark@st.com <angus.clark@st.com>"
-  kernel@stlinux.com <kernel@stlinux.com>
+ "Cc\0linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>"
   linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
-  linux-mtd@lists.infradead.org <linux-mtd@lists.infradead.org>
- " Ezequiel Garcia \\(ezequiel.garcia@free-electrons.com\\) <ezequiel.garcia@free-electrons.com>"
+  kernel@stlinux.com <kernel@stlinux.com>
   computersforpeace@gmail.com <computersforpeace@gmail.com>
+  linux-mtd@lists.infradead.org <linux-mtd@lists.infradead.org>
   dwmw2@infradead.org <dwmw2@infradead.org>
- " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0"
+  angus.clark@st.com <angus.clark@st.com>
+ " Ezequiel Garcia (ezequiel.garcia@free-electrons.com) <ezequiel.garcia@free-electrons.com>\0"
  "\00:1\0"
  "b\0"
  "> >> >+\t/* Reset and disable boot-mode controller */\n"
@@ -50,4 +50,4 @@
  "Linaro.org \342\224\202 Open source software for ARM SoCs\n"
  Follow Linaro: Facebook | Twitter | Blog
 
-e7d25329ab28443ee2a197854788d3ec9f8c906d5a30e0605a9e5e8b1f983789
+6a90ba6446b60915b0f0d5fe43b1b3f857d5c35ebdb804fd0aba3f01b7e2c40b

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.