From: "Richard W.M. Jones" <rjones@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
Anthony Liguori <aliguori@amazon.com>
Subject: Re: [Qemu-devel] [PULL 00/10] target-arm queue
Date: Sun, 4 May 2014 20:45:31 +0100 [thread overview]
Message-ID: <20140504194531.GE1302@redhat.com> (raw)
In-Reply-To: <CAFEAcA9CGJQmM2dnua1zsOtOPMLeRpZQV773bK+b-jhLV7rK2Q@mail.gmail.com>
On Sun, May 04, 2014 at 08:36:20PM +0100, Peter Maydell wrote:
> OK, so you have a kernel (possibly just kernel config) problem
> here -- this means QEMU got EPERM trying to open /dev/kvm.
Yes for some reason it was 0600. I set it to 0666.
> This isn't going to work for aarch64 at the moment because:
> * KVM aarch64 currently requires '-cpu host'
OK -- I will play with libguestfs to make sure it passes this flag,
and try again. Currently waiting for the host (which has panicked
again) to be rebooted manually.
Thanks again,
Rich.
--
Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones
Read my programming and virtualization blog: http://rwmj.wordpress.com
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next prev parent reply other threads:[~2014-05-04 19:45 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-01 14:54 [Qemu-devel] [PULL 00/10] target-arm queue Peter Maydell
2014-05-01 14:54 ` [Qemu-devel] [PULL 01/10] target-arm: Implement XScale cache lockdown operations as NOPs Peter Maydell
2014-05-01 14:54 ` [Qemu-devel] [PULL 02/10] armv7m_nvic: fix CPUID Base Register Peter Maydell
2014-05-01 14:55 ` [Qemu-devel] [PULL 03/10] target-arm: implement WFE/YIELD as a yield for AArch64 Peter Maydell
2014-05-01 14:55 ` [Qemu-devel] [PULL 04/10] target-arm: Make vbar_write 64bit friendly on 32bit hosts Peter Maydell
2014-05-01 14:55 ` [Qemu-devel] [PULL 05/10] target-arm: A64: Handle blr lr Peter Maydell
2014-05-01 14:55 ` [Qemu-devel] [PULL 06/10] target-arm: A64: Fix a typo when declaring TLBI ops Peter Maydell
2014-05-01 14:55 ` [Qemu-devel] [PULL 07/10] target-arm: Correct a comment refering to EL0 Peter Maydell
2014-05-01 14:55 ` [Qemu-devel] [PULL 08/10] hw/arm/virt: Create the GIC ourselves rather than (ab)using a15mpcore_priv Peter Maydell
2014-05-01 14:55 ` [Qemu-devel] [PULL 09/10] hw/arm/virt: Put GIC register banks on 64K boundaries Peter Maydell
2014-05-01 14:55 ` [Qemu-devel] [PULL 10/10] hw/arm/virt: Add support for Cortex-A57 Peter Maydell
2014-05-02 11:11 ` [Qemu-devel] [PULL 00/10] target-arm queue Peter Maydell
2014-05-04 18:30 ` Richard W.M. Jones
2014-05-04 18:48 ` Peter Maydell
2014-05-04 18:58 ` Richard W.M. Jones
2014-05-04 19:36 ` Peter Maydell
2014-05-04 19:45 ` Richard W.M. Jones [this message]
2014-05-04 19:55 ` Peter Maydell
2014-05-04 19:29 ` Richard W.M. Jones
-- strict thread matches above, loose matches on Subject: below --
2019-07-15 13:42 Peter Maydell
2019-07-15 14:18 ` Peter Maydell
2019-07-15 17:03 ` no-reply
2019-07-16 8:55 ` no-reply
2018-11-19 15:57 Peter Maydell
2018-11-19 18:10 ` Peter Maydell
2018-03-23 18:49 Peter Maydell
2018-03-23 21:45 ` no-reply
2018-03-25 15:04 ` Peter Maydell
2015-03-11 14:18 Peter Maydell
2015-03-11 18:21 ` Peter Maydell
2011-12-13 18:30 Peter Maydell
2011-12-14 20:41 ` andrzej zaborowski
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