From mboxrd@z Thu Jan 1 00:00:00 1970 From: Darren Etheridge Subject: Re: [PATCH V5 1/3] arm: dts: dra7: Add crossbar device binding Date: Tue, 6 May 2014 14:58:04 -0500 Message-ID: <20140506195804.GD2626@ti.com> References: <1399384579-25620-1-git-send-email-r.sricharan@ti.com> <1399384579-25620-2-git-send-email-r.sricharan@ti.com> <20140506194055.GA6962@saruman.home> <53693C02.2090305@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Return-path: Content-Disposition: inline In-Reply-To: <53693C02.2090305@ti.com> Sender: linux-kernel-owner@vger.kernel.org To: Nishanth Menon Cc: balbi@ti.com, Sricharan R , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linus.walleij@linaro.org, linux@arm.linux.org.uk, tony@atomide.com, rnayak@ti.com, marc.zyngier@arm.com, grant.likely@linaro.org, mark.rutland@arm.com, tglx@linutronix.de, galak@codeaurora.org, santosh.shilimkar@ti.com, bcousson@baylibre.com, robherring2@gmail.com List-Id: linux-omap@vger.kernel.org Nishanth Menon wrote on Tue [2014-May-06 14:46:10 -0500]: > On 05/06/2014 02:40 PM, Felipe Balbi wrote: > > On Tue, May 06, 2014 at 07:26:17PM +0530, Sricharan R wrote: > >> This adds the irq crossbar device node. > >> > >> There is a IRQ crossbar device in the soc, which > >> maps the irq requests from the peripherals to the > >> mpu interrupt controller's inputs. The Peripheral irq > >> requests are connected to only one crossbar > >> input and the output of the crossbar is connected to only one > >> controller's input line. The crossbar device is used to map > >> a peripheral input to a free mpu's interrupt controller line. > >> > >> Cc: Benoit Cousson > >> Cc: Santosh Shilimkar > >> Cc: Rajendra Nayak > >> Cc: Tony Lindgren > >> Signed-off-by: Sricharan R > >> Signed-off-by: Nishanth Menon > >> --- > >> [V5] Rebased on top of 3.15-rc4 and corrected the > >> irqs-reserved list > >> > >> arch/arm/boot/dts/dra7.dtsi | 8 ++++++++ > >> 1 file changed, 8 insertions(+) > >> > >> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi > >> index 149b550..0274a86 100644 > >> --- a/arch/arm/boot/dts/dra7.dtsi > >> +++ b/arch/arm/boot/dts/dra7.dtsi > >> @@ -790,6 +790,14 @@ > >> status = "disabled"; > >> }; > >> }; > >> + > >> + crossbar_mpu: crossbar@4a020000 { > > > > shouldn't this be "status = disabled"; so that boards enable this > > on-demand ?? > > > It cannot be and does not need to be. crossbar is an SoC feature. by > defining crossbar, the IRQ numbers we provide in DTS now becomes > crossbar numbers which get mapped to GIC interrupt numbers dynamically. > > further crossbar is not a board feature. it is as ingrained in DRA7 > behavior as GIC is. we are fortunate that we have some default mapping > of crossbar that allows the current peripherals to work, with this > support, we dont have to depend any longer on "we are lucky that is > mapped". > > That said, in hindsight, patch #1 and 2 should be squashed IMHO. else > we have a bisectability problem here. > Yes the bisectability problem is completely true - I was just testing that as your email came in. In fact I think all three patches need to be squashed into one, I can't boot the dra7-EVM unless I have all three patches applied. With all three patches applied, basic boot is looking good. I will reply with my tested-by once I have got VIP, etc up and running. Darren From mboxrd@z Thu Jan 1 00:00:00 1970 From: detheridge@ti.com (Darren Etheridge) Date: Tue, 6 May 2014 14:58:04 -0500 Subject: [PATCH V5 1/3] arm: dts: dra7: Add crossbar device binding In-Reply-To: <53693C02.2090305@ti.com> References: <1399384579-25620-1-git-send-email-r.sricharan@ti.com> <1399384579-25620-2-git-send-email-r.sricharan@ti.com> <20140506194055.GA6962@saruman.home> <53693C02.2090305@ti.com> Message-ID: <20140506195804.GD2626@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Nishanth Menon wrote on Tue [2014-May-06 14:46:10 -0500]: > On 05/06/2014 02:40 PM, Felipe Balbi wrote: > > On Tue, May 06, 2014 at 07:26:17PM +0530, Sricharan R wrote: > >> This adds the irq crossbar device node. > >> > >> There is a IRQ crossbar device in the soc, which > >> maps the irq requests from the peripherals to the > >> mpu interrupt controller's inputs. The Peripheral irq > >> requests are connected to only one crossbar > >> input and the output of the crossbar is connected to only one > >> controller's input line. The crossbar device is used to map > >> a peripheral input to a free mpu's interrupt controller line. > >> > >> Cc: Benoit Cousson > >> Cc: Santosh Shilimkar > >> Cc: Rajendra Nayak > >> Cc: Tony Lindgren > >> Signed-off-by: Sricharan R > >> Signed-off-by: Nishanth Menon > >> --- > >> [V5] Rebased on top of 3.15-rc4 and corrected the > >> irqs-reserved list > >> > >> arch/arm/boot/dts/dra7.dtsi | 8 ++++++++ > >> 1 file changed, 8 insertions(+) > >> > >> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi > >> index 149b550..0274a86 100644 > >> --- a/arch/arm/boot/dts/dra7.dtsi > >> +++ b/arch/arm/boot/dts/dra7.dtsi > >> @@ -790,6 +790,14 @@ > >> status = "disabled"; > >> }; > >> }; > >> + > >> + crossbar_mpu: crossbar at 4a020000 { > > > > shouldn't this be "status = disabled"; so that boards enable this > > on-demand ?? > > > It cannot be and does not need to be. crossbar is an SoC feature. by > defining crossbar, the IRQ numbers we provide in DTS now becomes > crossbar numbers which get mapped to GIC interrupt numbers dynamically. > > further crossbar is not a board feature. it is as ingrained in DRA7 > behavior as GIC is. we are fortunate that we have some default mapping > of crossbar that allows the current peripherals to work, with this > support, we dont have to depend any longer on "we are lucky that is > mapped". > > That said, in hindsight, patch #1 and 2 should be squashed IMHO. else > we have a bisectability problem here. > Yes the bisectability problem is completely true - I was just testing that as your email came in. In fact I think all three patches need to be squashed into one, I can't boot the dra7-EVM unless I have all three patches applied. With all three patches applied, basic boot is looking good. I will reply with my tested-by once I have got VIP, etc up and running. Darren From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754499AbaEFT7b (ORCPT ); Tue, 6 May 2014 15:59:31 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:35366 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754460AbaEFT73 (ORCPT ); Tue, 6 May 2014 15:59:29 -0400 Date: Tue, 6 May 2014 14:58:04 -0500 From: Darren Etheridge To: Nishanth Menon CC: , Sricharan R , , , , , , , , , , , , , , , , , Subject: Re: [PATCH V5 1/3] arm: dts: dra7: Add crossbar device binding Message-ID: <20140506195804.GD2626@ti.com> References: <1399384579-25620-1-git-send-email-r.sricharan@ti.com> <1399384579-25620-2-git-send-email-r.sricharan@ti.com> <20140506194055.GA6962@saruman.home> <53693C02.2090305@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <53693C02.2090305@ti.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Nishanth Menon wrote on Tue [2014-May-06 14:46:10 -0500]: > On 05/06/2014 02:40 PM, Felipe Balbi wrote: > > On Tue, May 06, 2014 at 07:26:17PM +0530, Sricharan R wrote: > >> This adds the irq crossbar device node. > >> > >> There is a IRQ crossbar device in the soc, which > >> maps the irq requests from the peripherals to the > >> mpu interrupt controller's inputs. The Peripheral irq > >> requests are connected to only one crossbar > >> input and the output of the crossbar is connected to only one > >> controller's input line. The crossbar device is used to map > >> a peripheral input to a free mpu's interrupt controller line. > >> > >> Cc: Benoit Cousson > >> Cc: Santosh Shilimkar > >> Cc: Rajendra Nayak > >> Cc: Tony Lindgren > >> Signed-off-by: Sricharan R > >> Signed-off-by: Nishanth Menon > >> --- > >> [V5] Rebased on top of 3.15-rc4 and corrected the > >> irqs-reserved list > >> > >> arch/arm/boot/dts/dra7.dtsi | 8 ++++++++ > >> 1 file changed, 8 insertions(+) > >> > >> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi > >> index 149b550..0274a86 100644 > >> --- a/arch/arm/boot/dts/dra7.dtsi > >> +++ b/arch/arm/boot/dts/dra7.dtsi > >> @@ -790,6 +790,14 @@ > >> status = "disabled"; > >> }; > >> }; > >> + > >> + crossbar_mpu: crossbar@4a020000 { > > > > shouldn't this be "status = disabled"; so that boards enable this > > on-demand ?? > > > It cannot be and does not need to be. crossbar is an SoC feature. by > defining crossbar, the IRQ numbers we provide in DTS now becomes > crossbar numbers which get mapped to GIC interrupt numbers dynamically. > > further crossbar is not a board feature. it is as ingrained in DRA7 > behavior as GIC is. we are fortunate that we have some default mapping > of crossbar that allows the current peripherals to work, with this > support, we dont have to depend any longer on "we are lucky that is > mapped". > > That said, in hindsight, patch #1 and 2 should be squashed IMHO. else > we have a bisectability problem here. > Yes the bisectability problem is completely true - I was just testing that as your email came in. In fact I think all three patches need to be squashed into one, I can't boot the dra7-EVM unless I have all three patches applied. With all three patches applied, basic boot is looking good. I will reply with my tested-by once I have got VIP, etc up and running. Darren