Re: [PATCH v3 2/4] ARM: dts: am437x-gp-evm: add support for parallel NAND flash

[Tony Lindgren <tony@atomide.com>]

* Gupta, Pekon <pekon@ti.com> [140507 12:20]:
> >From: Tony Lindgren [mailto:tony@atomide.com]
> >>* Pekon Gupta <pekon@ti.com> [140422 00:34]:
> >> +&gpmc {
> >> +	status = "okay";
> >> +	pinctrl-names = "default";
> >> +	pinctrl-0 = <&nand_flash_x8>;
> >> +	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
> >
> >Please use the minimum size 16MB GPMC range here, NAND only
> >has few registers addressable unlike NOR that actually uses the
> >whole range.
> >
> >> +	nand@0,0 {
> >> +		reg = <0 0 0>; /* CS0, offset 0 */
> >
> >Then here map the true size of the NAND device IO register area.
> >
> >BTW, we should do the similar changes to other files so we can
> >unify the GPMC partitioning a bit. But that's unsafe to do until
> >we have fixed the issue of mapping GPMC devices to a different
> >location from the bootloader location.
> >
> I have found the fix of this issue in gpmc_cs_remap() just testing it
> using beaglebone NOR cape. I'll post that separately, once I'm confident.

OK that's great. Yet another issue I've noticed is that u-boot
seems to program 37xx L3 to run at 200 MHz and the LAN9220
timings overflow the GPMC registers as 200 / 5 >= 32.
 
> But for now, I'll re-send just these patches for NAND DT node with
> your feedbacks incorporated, so that NAND is stable on these
> platforms / boards from 3.16 onwards.

OK sounds good to me.

Tony