From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCHv1 0/7] ARM core support for hardware I/O coherency in non-SMP platforms
Date: Thu, 15 May 2014 14:27:54 +0100 [thread overview]
Message-ID: <20140515132754.GG27594@arm.com> (raw)
In-Reply-To: <20140515120152.7b0beb37@free-electrons.com>
On Thu, May 15, 2014 at 11:01:52AM +0100, Thomas Petazzoni wrote:
> On Wed, 14 May 2014 12:07:28 -0500, Rob Herring wrote:
>
> > > This hardware I/O coherency mechanism needs a set of ARM core
> > > requirements to operate properly:
> > >
> > > * On Armada 370 (a single core processor)
> > >
> > > - The cache policy of pages must be set to "write allocate".
> >
> > Why do we want !SMP to be no write allocate in the first place? Seems
> > like we should always enable write-allocate at least for v7.
>
> Ok, seems like it matches the suggestion from Catalin. I've sent a
> quick patch in my reply to Catalin, if you could have a look and tell
> if it's OK, I can use that in my next version.
It's probably also worth mentioning in your commit log that modern ARM CPUs
can change the allocation policy dynamically based on the access pattern
(e.g. switch to no-allocate when there is a series of streaming stores), so
historical reasons for forcing write-no-allocate aren't applicable on these
cores.
> I really don't see any justification for why it some situations the
> bootloader would be responsible for it, and why in some other
> situations the kernel would be responsible for it.
Well, for better or worse, we are moving in the direction of Linux running
non-secure with a non-trivial amount of higher privileged software running
in the system. We can use this as a basis to decide whether or not Linux
should be setting configuration bits by looking at whether or not these bits
are accessible from non-secure svc mode.
I'm not denying that we've not been following this rule in the past, but
given where we're going with ARMv8 and arm64, the sooner people realise that
the firmware and bootloader have some duties in the way of system
configuration, then the less pain they will have later on when they try to
boot Linux.
Will
next prev parent reply other threads:[~2014-05-15 13:27 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-14 15:50 [RFC PATCHv1 0/7] ARM core support for hardware I/O coherency in non-SMP platforms Thomas Petazzoni
2014-05-14 15:50 ` [RFC PATCHv1 1/7] ARM: extend machine_desc with additional flags Thomas Petazzoni
2014-05-14 15:50 ` [RFC PATCHv1 2/7] ARM: mm: implement the usage of the machine_desc flags Thomas Petazzoni
2014-05-14 15:50 ` [RFC PATCHv1 3/7] ARM: mm: enable SMP bit and TLB broadcast bit on !SMP when needed Thomas Petazzoni
2014-05-14 15:50 ` [RFC PATCHv1 4/7] ARM: kernel: allow the SCU to be enabled even on !SMP Thomas Petazzoni
2014-05-14 15:50 ` [RFC PATCHv1 5/7] ARM: mvebu: split Armada 370 and Armada XP machine_desc Thomas Petazzoni
2014-05-14 15:50 ` [RFC PATCHv1 6/7] ARM: mvebu: define the Armada 370/375/38x/XP machine_desc flags Thomas Petazzoni
2014-05-14 15:50 ` [RFC PATCHv1 7/7] ARM: mvebu: I/O coherency no longer needs SMP on 375 and 38x Thomas Petazzoni
2014-05-14 17:04 ` [RFC PATCHv1 0/7] ARM core support for hardware I/O coherency in non-SMP platforms Catalin Marinas
2014-05-15 9:50 ` Thomas Petazzoni
2014-05-15 14:22 ` Catalin Marinas
2014-05-15 14:59 ` Rob Herring
2014-05-15 15:25 ` Catalin Marinas
2014-05-15 19:11 ` Rob Herring
2014-05-16 15:11 ` Catalin Marinas
2014-05-19 9:19 ` Thomas Petazzoni
2014-05-19 9:17 ` Thomas Petazzoni
2014-05-19 10:42 ` Catalin Marinas
2014-05-19 11:17 ` Thomas Petazzoni
2014-05-19 15:19 ` Catalin Marinas
2014-05-19 13:38 ` Thomas Petazzoni
2014-05-14 17:07 ` Rob Herring
2014-05-15 10:01 ` Thomas Petazzoni
2014-05-15 13:27 ` Will Deacon [this message]
2014-05-15 13:44 ` Thomas Petazzoni
2014-05-15 14:44 ` Rob Herring
2014-05-19 9:31 ` Thomas Petazzoni
2014-05-19 16:53 ` Rob Herring
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