From: Andy Gross <agross@codeaurora.org>
To: Vinod Koul <vinod.koul@intel.com>
Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH] dmaengine: qcom_bam_dma: Add descriptor flag APIs
Date: Thu, 15 May 2014 12:32:06 -0500 [thread overview]
Message-ID: <20140515173206.GA16858@qualcomm.com> (raw)
In-Reply-To: <20140502180827.GA9476@qualcomm.com>
On Fri, May 02, 2014 at 01:08:27PM -0500, Andy Gross wrote:
> On Fri, May 02, 2014 at 09:58:41PM +0530, Vinod Koul wrote:
> > On Thu, Apr 17, 2014 at 05:04:02PM -0500, Andy Gross wrote:
> > > This patch adds APIs that allow for BAM hardware flags to be set per
> > > descriptor. Each one of the new flags informs the attached peripheral of a
> > > special behavior that is required.
> > >
> > > The EOT flag requests that the peripheral assert an end of transaction interrupt
> > > when that descriptor is complete. It also results in special signaling protocol
> > > that is used between the attached peripheral and the core using the DMA
> > > controller.
> > DMA_PREP_INTERRUPT ??
>
> I have 3 different IRQs that can be asserted based on the bit I set in the
> hardware descriptor. The normal IRQ is the INT bit. However, in some cases the
> peripheral protocol requires the use of the EOT or EOB interrupt instead. The
> DMA_PREP_INTERRUPT would only work if I had only 2 choices.
Thinking about this more, I could use the DMA_PREP_INTERRUPT to cover the EOT
flag. However, I might get in a bind later if I need to support the EOB (end of
block) interrupt.
>
> >
> > >
> > > The NWD flag requests that the peripheral wait until the data has been fully
> > > processed before signaling an interrupt.
> > interrupt for transaction complete or DMA request?
>
> This is a special signaling mechanism that holds off the DMA interrupt until the
> peripheral actually acks that the data has been processed completely. This is
> required in many cases by the peripheral. One example is the SPI controller.
> At the end of a transaction you are supposed to set the NWD so that the chip
> select is de-asserted.
I'm not sure what flag I could map this to... maybe DMA_CTRL_ACK? or maybe the
DMA_PREP_FENCE? I don't generally like overloading the flags and slightly
twisting their intent. Could we add a flag to denote device ACK?
--
sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: agross@codeaurora.org (Andy Gross)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] dmaengine: qcom_bam_dma: Add descriptor flag APIs
Date: Thu, 15 May 2014 12:32:06 -0500 [thread overview]
Message-ID: <20140515173206.GA16858@qualcomm.com> (raw)
In-Reply-To: <20140502180827.GA9476@qualcomm.com>
On Fri, May 02, 2014 at 01:08:27PM -0500, Andy Gross wrote:
> On Fri, May 02, 2014 at 09:58:41PM +0530, Vinod Koul wrote:
> > On Thu, Apr 17, 2014 at 05:04:02PM -0500, Andy Gross wrote:
> > > This patch adds APIs that allow for BAM hardware flags to be set per
> > > descriptor. Each one of the new flags informs the attached peripheral of a
> > > special behavior that is required.
> > >
> > > The EOT flag requests that the peripheral assert an end of transaction interrupt
> > > when that descriptor is complete. It also results in special signaling protocol
> > > that is used between the attached peripheral and the core using the DMA
> > > controller.
> > DMA_PREP_INTERRUPT ??
>
> I have 3 different IRQs that can be asserted based on the bit I set in the
> hardware descriptor. The normal IRQ is the INT bit. However, in some cases the
> peripheral protocol requires the use of the EOT or EOB interrupt instead. The
> DMA_PREP_INTERRUPT would only work if I had only 2 choices.
Thinking about this more, I could use the DMA_PREP_INTERRUPT to cover the EOT
flag. However, I might get in a bind later if I need to support the EOB (end of
block) interrupt.
>
> >
> > >
> > > The NWD flag requests that the peripheral wait until the data has been fully
> > > processed before signaling an interrupt.
> > interrupt for transaction complete or DMA request?
>
> This is a special signaling mechanism that holds off the DMA interrupt until the
> peripheral actually acks that the data has been processed completely. This is
> required in many cases by the peripheral. One example is the SPI controller.
> At the end of a transaction you are supposed to set the NWD so that the chip
> select is de-asserted.
I'm not sure what flag I could map this to... maybe DMA_CTRL_ACK? or maybe the
DMA_PREP_FENCE? I don't generally like overloading the flags and slightly
twisting their intent. Could we add a flag to denote device ACK?
--
sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
next prev parent reply other threads:[~2014-05-15 17:32 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-17 22:04 [PATCH] dmaengine: qcom_bam_dma: Add descriptor flag APIs Andy Gross
2014-04-17 22:04 ` Andy Gross
2014-05-02 16:28 ` Vinod Koul
2014-05-02 16:28 ` Vinod Koul
2014-05-02 18:08 ` Andy Gross
2014-05-02 18:08 ` Andy Gross
2014-05-15 17:32 ` Andy Gross [this message]
2014-05-15 17:32 ` Andy Gross
2014-05-15 19:03 ` Srinivas Kandagatla
2014-05-15 19:03 ` Srinivas Kandagatla
2014-05-22 6:10 ` Vinod Koul
2014-05-22 6:10 ` Vinod Koul
2014-05-22 15:09 ` Andy Gross
2014-05-22 15:09 ` Andy Gross
2014-05-22 15:27 ` Srinivas Kandagatla
2014-05-22 15:27 ` Srinivas Kandagatla
2014-05-22 15:32 ` Andy Gross
2014-05-22 15:32 ` Andy Gross
2014-05-22 15:56 ` Srinivas Kandagatla
2014-05-22 15:56 ` Srinivas Kandagatla
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