Re: [Qemu-devel] [PATCH v1 10/22] target-arm: A64: Introduce arm64_banked_spsr_index()

["Edgar E. Iglesias" <edgar.iglesias@gmail.com>]

On Fri, May 16, 2014 at 03:31:16PM +0100, Peter Maydell wrote:
> On 6 May 2014 07:08, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> >
> > Add arm64_banked_spsr_index(), used to map an Exception Level
> > to an index in the baked_spsr array.
> >
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
> >  target-arm/helper-a64.c |  5 +++--
> >  target-arm/internals.h  | 14 ++++++++++++++
> >  target-arm/op_helper.c  |  3 ++-
> >  3 files changed, 19 insertions(+), 3 deletions(-)
> >
> > diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
> > index 10bd1fc..415efbe 100644
> > --- a/target-arm/helper-a64.c
> > +++ b/target-arm/helper-a64.c
> > @@ -444,6 +444,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
> >      ARMCPU *cpu = ARM_CPU(cs);
> >      CPUARMState *env = &cpu->env;
> >      target_ulong addr = env->cp15.vbar_el[VBAR_EL_IDX(1)];
> > +    unsigned int spsr_idx = arm64_banked_spsr_index(1);
> >      int i;
> >
> >      if (arm_current_pl(env) == 0) {
> > @@ -488,12 +489,12 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
> >      }
> >
> >      if (is_a64(env)) {
> > -        env->banked_spsr[0] = pstate_read(env);
> > +        env->banked_spsr[spsr_idx] = pstate_read(env);
> >          env->sp_el[arm_current_pl(env)] = env->xregs[31];
> >          env->xregs[31] = env->sp_el[1];
> >          env->elr_el[ELR_EL_IDX(1)] = env->pc;
> >      } else {
> > -        env->banked_spsr[0] = cpsr_read(env);
> > +        env->banked_spsr[spsr_idx] = cpsr_read(env);
> >          if (!env->thumb) {
> >              env->cp15.esr_el[ESR_EL_IDX(1)] |= 1 << 25;
> >          }
> 
> This looks bogus -- the function you've added is only
> valid if we are taking the exception from AArch64, but we
> use the spsr_idx in the from-AArch32 case as well.

Good catch, thanks!

> 
> > diff --git a/target-arm/internals.h b/target-arm/internals.h
> > index d63a975..7c39946 100644
> > --- a/target-arm/internals.h
> > +++ b/target-arm/internals.h
> > @@ -75,6 +75,20 @@ static inline void arm_log_exception(int idx)
> >   */
> >  #define GTIMER_SCALE 16
> >
> > +/*
> > + * For aarch64, map a given EL to an index in the banked_spsr array.
> 
> In comments, "AArch64", please.
> 
> > + */
> > +static inline unsigned int arm64_banked_spsr_index(unsigned int el)
> 
> "aarch64", not "arm64", please.


Will fix

Cheers,
Edgar