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Date:   Thu, 22 May 2014 09:59:34 +0200
From:   Ralf Baechle <ralf@linux-mips.org>
To:     Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc:     linux-mips@linux-mips.org, David Daney <ddaney.cavm@gmail.com>,
        James Hogan <james.hogan@imgtec.com>, kvm@vger.kernel.org,
        David Daney <david.daney@cavium.com>
Subject: Re: [PATCH 06/15] MIPS: Add minimal support for OCTEON3 to c-r4k.c
Message-ID: <20140522075934.GU10287@linux-mips.org>
References: <1400597236-11352-1-git-send-email-andreas.herrmann@caviumnetworks.com>
 <1400597236-11352-7-git-send-email-andreas.herrmann@caviumnetworks.com>
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 <20140521210212.GH11800@alberich>
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On Wed, May 21, 2014 at 11:02:12PM +0200, Andreas Herrmann wrote:

> On Wed, May 21, 2014 at 02:40:41PM +0200, Ralf Baechle wrote:
> > On Tue, May 20, 2014 at 04:47:07PM +0200, Andreas Herrmann wrote:
> > 
> > > +static inline void r4k_blast_dcache_page_dc128(unsigned long addr)
> > > +{
> > > +	R4600_HIT_CACHEOP_WAR_IMPL;
> > 
> > The R4600 has 32 byte cache lines that is this line will never be
> > executed on an R4600 thus can be dropped.
> 
> So the line can also be removed from r4k_blast_dcache_page_dc64?

Yes, indeed.  Just did that now.

  Ralf