diff for duplicates of <20140522160908.GD27931@arm.com> diff --git a/a/1.txt b/N1/1.txt index d44f723..0d6935d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ On Thu, May 22, 2014 at 04:49:16PM +0100, Arnd Bergmann wrote: > On Thursday 22 May 2014 15:45:03 Catalin Marinas wrote: > > On Thu, May 22, 2014 at 09:31:37AM +0100, Arnd Bergmann wrote: > > > commit 42c4dafe803dcad82980fd8b0831a89032156f93 -> > > Author: Catalin Marinas <catalin.marinas@arm.com> +> > > Author: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org> > > > Date: Thu Jul 1 13:22:48 2010 +0100 > > > > > > ARM: 6202/1: Do not ARM_DMA_MEM_BUFFERABLE on RealView boards with L210/L220 @@ -12,9 +12,9 @@ On Thu, May 22, 2014 at 04:49:16PM +0100, Arnd Bergmann wrote: > > > followed by an L2 cache sync) when ARM_DMA_MEM_BUFFERABLE is enabled. > > > The patch disables ARM_DMA_MEM_BUFFERABLE for these boards. > > > -> > > Tested-by: Linus Walleij <linus.walleij@stericsson.com> -> > > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> -> > > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> +> > > Tested-by: Linus Walleij <linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org> +> > > Signed-off-by: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org> +> > > Signed-off-by: Russell King <rmk+kernel-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> > > > > Looking through the L220 errata document, I think this relates to 425331 > > which says that a cache sync can deadlock the system if the write buffer @@ -49,3 +49,7 @@ here, I'm happy to enable ARM_DMA_MEM_BUFFERABLE for these boards. -- Catalin +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index ef4da25..ce3c44a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,17 +2,27 @@ "ref\05678119.IM3FN0FlT6@wuerfel\0" "ref\020140522144503.GA27931@arm.com\0" "ref\05057707.jNCXlqf9dH@wuerfel\0" - "From\0catalin.marinas@arm.com (Catalin Marinas)\0" - "Subject\0[PATCH v2] ARM: realview: basic device tree implementation\0" + "From\0Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>\0" + "Subject\0Re: [PATCH v2] ARM: realview: basic device tree implementation\0" "Date\0Thu, 22 May 2014 17:09:08 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>\0" + "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>" + Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + Mark Rutland <Mark.Rutland-5wv7dgnIgG8@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> + Pawel Moll <Pawel.Moll-5wv7dgnIgG8@public.gmane.org> + Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Marc Zyngier <Marc.Zyngier-5wv7dgnIgG8@public.gmane.org> + Will Deacon <Will.Deacon-5wv7dgnIgG8@public.gmane.org> + Feng Kan <fkan-qTEPVZfXA3Y@public.gmane.org> + " Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>\0" "\00:1\0" "b\0" "On Thu, May 22, 2014 at 04:49:16PM +0100, Arnd Bergmann wrote:\n" "> On Thursday 22 May 2014 15:45:03 Catalin Marinas wrote:\n" "> > On Thu, May 22, 2014 at 09:31:37AM +0100, Arnd Bergmann wrote:\n" "> > > commit 42c4dafe803dcad82980fd8b0831a89032156f93\n" - "> > > Author: Catalin Marinas <catalin.marinas@arm.com>\n" + "> > > Author: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>\n" "> > > Date: Thu Jul 1 13:22:48 2010 +0100\n" "> > > \n" "> > > ARM: 6202/1: Do not ARM_DMA_MEM_BUFFERABLE on RealView boards with L210/L220\n" @@ -22,9 +32,9 @@ "> > > followed by an L2 cache sync) when ARM_DMA_MEM_BUFFERABLE is enabled.\n" "> > > The patch disables ARM_DMA_MEM_BUFFERABLE for these boards.\n" "> > > \n" - "> > > Tested-by: Linus Walleij <linus.walleij@stericsson.com>\n" - "> > > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>\n" - "> > > Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>\n" + "> > > Tested-by: Linus Walleij <linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org>\n" + "> > > Signed-off-by: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>\n" + "> > > Signed-off-by: Russell King <rmk+kernel-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>\n" "> > \n" "> > Looking through the L220 errata document, I think this relates to 425331\n" "> > which says that a cache sync can deadlock the system if the write buffer\n" @@ -58,6 +68,10 @@ "here, I'm happy to enable ARM_DMA_MEM_BUFFERABLE for these boards.\n" "\n" "-- \n" - Catalin + "Catalin\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -b0a971d225bebcbda1c69f69b56cb3d56ef92b950472e4ac3a1bd4abc0278bfd +b7f9c965bed0986ca918fbeaa5c6c605504d2a29efa87fac502b46b7870668df
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