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From: Don Zickus <dzickus@redhat.com>
To: Jiri Olsa <jolsa@redhat.com>
Cc: acme@ghostprotocols.net, peterz@infradead.org,
	LKML <linux-kernel@vger.kernel.org>,
	namhyung@gmail.com, eranian@google.com,
	Andi Kleen <andi@firstfloor.org>
Subject: Re: [PATCH 6/7] perf: Add support to dynamically get cacheline size
Date: Fri, 23 May 2014 13:18:01 -0400	[thread overview]
Message-ID: <20140523171801.GO50500@redhat.com> (raw)
In-Reply-To: <20140523165405.GE1074@krava>

On Fri, May 23, 2014 at 06:54:06PM +0200, Jiri Olsa wrote:
> On Mon, May 19, 2014 at 03:13:52PM -0400, Don Zickus wrote:
> > Different arches may have different cacheline sizes.  Look it up and set
> > a global variable for reference.
> > 
> > Signed-off-by: Don Zickus <dzickus@redhat.com>
> > ---
> >  tools/perf/util/cpumap.c | 31 +++++++++++++++++++++++++++++++
> >  tools/perf/util/cpumap.h | 12 ++++++++++++
> >  tools/perf/util/sort.c   |  3 +++
> >  3 files changed, 46 insertions(+)
> > 
> > diff --git a/tools/perf/util/cpumap.c b/tools/perf/util/cpumap.c
> > index c4e55b7..d833238 100644
> > --- a/tools/perf/util/cpumap.c
> > +++ b/tools/perf/util/cpumap.c
> > @@ -477,3 +477,34 @@ int cpu__setup_cpunode_map(void)
> >  	closedir(dir1);
> >  	return 0;
> >  }
> > +
> > +int cpu__setup_cacheline_size(void)
> > +{
> > +	const char *mnt;
> > +	char path[PATH_MAX];
> > +	int n, ret, size;
> > +	FILE *fp;
> > +	
> > +
> > +	mnt = sysfs__mountpoint();
> > +	if (!mnt)
> > +		return -1;
> > +
> > +	n = snprintf(path, PATH_MAX, "%s/devices/system/cpu/cpu0/cache/index0/coherency_line_size", mnt);
> > +	if (n == PATH_MAX) {
> > +		pr_err("sysfs path crossed PATH_MAX(%d) size\n", PATH_MAX);
> > +		return -1;
> > +	}
> > +
> > +	fp = fopen(path, "r");
> > +	if (!fp)
> > +		return -1;
> > +	ret = fscanf(fp, "%d", &size);
> > +	fclose(fp);
> > +	if (ret != 1)
> > +		return -1;
> 
> you can use filename__read_int

Doh.  I forgot about that.  I can respin this patch or the whole series
for that.  Perhaps on Tuesday when we come back from our US Holiday.

Cheers,
Don

  reply	other threads:[~2014-05-23 17:18 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-19 19:13 [PATCH 0/7 V3] x86, nmi: Various fixes and cleanups Don Zickus
2014-05-19 19:13 ` [PATCH 1/7] events, perf: Pass protection and flags bits through mmap2 interface Don Zickus
2014-06-12 12:02   ` [tip:perf/core] " tip-bot for Peter Zijlstra
2014-05-19 19:13 ` [PATCH 2/7] Revert "perf: Disable PERF_RECORD_MMAP2 support" Don Zickus
2014-05-19 19:13 ` [PATCH 3/7] perf: Update mmap2 interface with protection and flag bits Don Zickus
2014-06-12 12:02   ` [tip:perf/core] perf tools: " tip-bot for Don Zickus
2014-05-19 19:13 ` [PATCH 4/7] perf report: Add mem-mode documentation to report command Don Zickus
2014-06-12 12:02   ` [tip:perf/core] " tip-bot for Don Zickus
2014-05-19 19:13 ` [PATCH 5/7] perf: Add cpumode to struct hist_entry Don Zickus
2014-05-19 19:13 ` [PATCH 6/7] perf: Add support to dynamically get cacheline size Don Zickus
2014-05-23 16:54   ` Jiri Olsa
2014-05-23 17:18     ` Don Zickus [this message]
2014-05-23 17:09   ` Jiri Olsa
2014-05-23 17:30     ` Don Zickus
2014-05-19 19:13 ` [PATCH 7/7] perf: Add dcacheline sort Don Zickus
2014-05-23 17:14   ` Jiri Olsa
  -- strict thread matches above, loose matches on Subject: below --
2014-05-27 16:28 [PATCH 0/7 V4] perf: Enable mmap2 and add dcacheline sorting Don Zickus
2014-05-27 16:28 ` [PATCH 6/7] perf: Add support to dynamically get cacheline size Don Zickus
2014-05-30  7:09   ` Namhyung Kim

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