diff for duplicates of <20140525193845.GA10768@lukather> diff --git a/a/1.txt b/N1/1.txt index 4ae382e..5635209 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -47,14 +47,14 @@ On Fri, May 23, 2014 at 03:51:24PM +0800, Chen-Yu Tsai wrote: > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu@0 { +> + cpu at 0 { > + compatible = "arm,cortex-a7"; > + device_type = "cpu"; > + reg = <0>; > + clocks = <&cpu>; > + }; > + -> + cpu@1 { +> + cpu at 1 { > + compatible = "arm,cortex-a7"; > + device_type = "cpu"; > + reg = <1>; @@ -102,7 +102,7 @@ Also, do you know if the arch timers are usable on the A23? > + clock-output-names = "osc32k"; > + }; > + -> + pll1: clk@01c20000 { +> + pll1: clk at 01c20000 { > + #clock-cells = <0>; > + compatible = "allwinner,sun8i-a23-pll1-clk"; > + reg = <0x01c20000 0x4>; @@ -110,7 +110,7 @@ Also, do you know if the arch timers are usable on the A23? > + clock-output-names = "pll1"; > + }; > + -> + pll6: clk@01c20028 { +> + pll6: clk at 01c20028 { > + #clock-cells = <1>; > + compatible = "allwinner,sun6i-a31-pll6-clk"; > + reg = <0x01c20028 0x4>; @@ -118,7 +118,7 @@ Also, do you know if the arch timers are usable on the A23? > + clock-output-names = "pll6_other", "pll6"; > + }; > + -> + cpu: cpu_clk@01c20050 { +> + cpu: cpu_clk at 01c20050 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-cpu-clk"; > + reg = <0x01c20050 0x4>; @@ -133,7 +133,7 @@ Also, do you know if the arch timers are usable on the A23? > + clock-output-names = "cpu"; > + }; > + -> + axi: axi_clk@01c20050 { +> + axi: axi_clk at 01c20050 { > + #clock-cells = <0>; > + /* > + * AXI clock on A23 is actually wider, @@ -149,7 +149,7 @@ anything differently (yet). > + clock-output-names = "axi"; > + }; > + -> + ahb1_pll6: ahb1_pll6_clk@01c20054 { +> + ahb1_pll6: ahb1_pll6_clk at 01c20054 { > + #clock-cells = <0>; > + compatible = "allwinner,sun6i-a31-ahb1-pll6-clk"; > + reg = <0x01c20054 0x4>; @@ -157,7 +157,7 @@ anything differently (yet). > + clock-output-names = "ahb1_pll6"; > + }; > + -> + ahb1_mux: ahb1_mux_clk@01c20054 { +> + ahb1_mux: ahb1_mux_clk at 01c20054 { > + #clock-cells = <0>; > + compatible = "allwinner,sun6i-a31-ahb1-mux-clk"; > + reg = <0x01c20054 0x4>; @@ -165,7 +165,7 @@ anything differently (yet). > + clock-output-names = "ahb1_mux"; > + }; > + -> + ahb1: ahb1_clk@01c20054 { +> + ahb1: ahb1_clk at 01c20054 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-ahb-clk"; > + reg = <0x01c20054 0x4>; @@ -173,7 +173,7 @@ anything differently (yet). > + clock-output-names = "ahb1"; > + }; > + -> + ahb1_gates: clk@01c20060 { +> + ahb1_gates: clk at 01c20060 { > + #clock-cells = <1>; > + compatible = "allwinner,sun8i-a23-ahb1-gates-clk"; > + reg = <0x01c20060 0x8>; @@ -189,7 +189,7 @@ anything differently (yet). > + "ahb1_drc"; > + }; > + -> + apb1: apb1_clk@01c20054 { +> + apb1: apb1_clk at 01c20054 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-apb0-clk"; > + reg = <0x01c20054 0x4>; @@ -197,7 +197,7 @@ anything differently (yet). > + clock-output-names = "apb1"; > + }; > + -> + apb1_gates: clk@01c20068 { +> + apb1_gates: clk at 01c20068 { > + #clock-cells = <1>; > + compatible = "allwinner,sun8i-a23-apb1-gates-clk"; > + reg = <0x01c20068 0x4>; @@ -206,7 +206,7 @@ anything differently (yet). > + "apb1_daudio0", "apb1_daudio1"; > + }; > + -> + apb2_mux: apb2_mux@01c20058 { +> + apb2_mux: apb2_mux at 01c20058 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-apb1-mux-clk"; > + reg = <0x01c20058 0x4>; @@ -216,7 +216,7 @@ anything differently (yet). It doesn't look to be ordered by physical address. -> + apb2: apb2@01c20058 { +> + apb2: apb2 at 01c20058 { > + #clock-cells = <0>; > + compatible = "allwinner,sun6i-a31-apb2-div-clk"; > + reg = <0x01c20058 0x4>; @@ -224,7 +224,7 @@ It doesn't look to be ordered by physical address. > + clock-output-names = "apb2"; > + }; > + -> + apb2_gates: clk@01c2006c { +> + apb2_gates: clk at 01c2006c { > + #clock-cells = <1>; > + compatible = "allwinner,sun8i-a23-apb2-gates-clk"; > + reg = <0x01c2006c 0x4>; @@ -235,7 +235,7 @@ It doesn't look to be ordered by physical address. > + "apb2_uart3", "apb2_uart4"; > + }; > + -> + mmc0_clk: clk@01c20088 { +> + mmc0_clk: clk at 01c20088 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-mod0-clk"; > + reg = <0x01c20088 0x4>; @@ -243,7 +243,7 @@ It doesn't look to be ordered by physical address. > + clock-output-names = "mmc0"; > + }; > + -> + mmc1_clk: clk@01c2008c { +> + mmc1_clk: clk at 01c2008c { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-mod0-clk"; > + reg = <0x01c2008c 0x4>; @@ -251,7 +251,7 @@ It doesn't look to be ordered by physical address. > + clock-output-names = "mmc1"; > + }; > + -> + mmc2_clk: clk@01c20090 { +> + mmc2_clk: clk at 01c20090 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-mod0-clk"; > + reg = <0x01c20090 0x4>; @@ -259,7 +259,7 @@ It doesn't look to be ordered by physical address. > + clock-output-names = "mmc2"; > + }; > + -> + spi0_clk: clk@01c200a0 { +> + spi0_clk: clk at 01c200a0 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-mod0-clk"; > + reg = <0x01c200a0 0x4>; @@ -267,7 +267,7 @@ It doesn't look to be ordered by physical address. > + clock-output-names = "spi0"; > + }; > + -> + spi1_clk: clk@01c200a4 { +> + spi1_clk: clk at 01c200a4 { > + #clock-cells = <0>; > + compatible = "allwinner,sun4i-a10-mod0-clk"; > + reg = <0x01c200a4 0x4>; @@ -276,13 +276,13 @@ It doesn't look to be ordered by physical address. > + }; > + }; > + -> + soc@01c00000 { +> + soc at 01c00000 { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + -> + pio: pinctrl@01c20800 { +> + pio: pinctrl at 01c20800 { > + compatible = "allwinner,sun8i-a23-pinctrl"; > + reg = <0x01c20800 0x400>; > + interrupts = <0 11 4>, @@ -295,21 +295,21 @@ It doesn't look to be ordered by physical address. > + #size-cells = <0>; > + #gpio-cells = <3>; > + -> + uart0_pins_a: uart0@0 { +> + uart0_pins_a: uart0 at 0 { > + allwinner,pins = "PF2", "PF4"; > + allwinner,function = "uart0"; > + allwinner,drive = <0>; > + allwinner,pull = <0>; > + }; > + -> + i2c0_pins_a: i2c0@0 { +> + i2c0_pins_a: i2c0 at 0 { > + allwinner,pins = "PH2", "PH3"; > + allwinner,function = "i2c0"; > + allwinner,drive = <0>; > + allwinner,pull = <0>; > + }; > + -> + i2c1_pins_a: i2c1@0 { +> + i2c1_pins_a: i2c1 at 0 { > + allwinner,pins = "PH4", "PH5"; > + allwinner,function = "i2c1"; > + allwinner,drive = <0>; @@ -317,25 +317,25 @@ It doesn't look to be ordered by physical address. > + }; > + }; > + -> + ahb1_rst: reset@01c202c0 { +> + ahb1_rst: reset at 01c202c0 { > + #reset-cells = <1>; > + compatible = "allwinner,sun6i-a31-ahb1-reset"; > + reg = <0x01c202c0 0xc>; > + }; > + -> + apb1_rst: reset@01c202d0 { +> + apb1_rst: reset at 01c202d0 { > + #reset-cells = <1>; > + compatible = "allwinner,sun6i-a31-clock-reset"; > + reg = <0x01c202d0 0x4>; > + }; > + -> + apb2_rst: reset@01c202d8 { +> + apb2_rst: reset at 01c202d8 { > + #reset-cells = <1>; > + compatible = "allwinner,sun6i-a31-clock-reset"; > + reg = <0x01c202d8 0x4>; > + }; > + -> + timer@01c20c00 { +> + timer at 01c20c00 { > + compatible = "allwinner,sun4i-a10-timer"; > + reg = <0x01c20c00 0xa0>; > + interrupts = <0 18 4>, @@ -343,13 +343,13 @@ It doesn't look to be ordered by physical address. > + clocks = <&osc24M>; > + }; > + -> + wdt0: watchdog@01c20ca0 { +> + wdt0: watchdog at 01c20ca0 { > + compatible = "allwinner,sun6i-a31-wdt"; > + reg = <0x01c20ca0 0x20>; > + interrupts = <0 25 4>; > + }; > + -> + uart0: serial@01c28000 { +> + uart0: serial at 01c28000 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x01c28000 0x400>; > + interrupts = <0 0 4>; @@ -360,7 +360,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + uart1: serial@01c28400 { +> + uart1: serial at 01c28400 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x01c28400 0x400>; > + interrupts = <0 1 4>; @@ -371,7 +371,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + uart2: serial@01c28800 { +> + uart2: serial at 01c28800 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x01c28800 0x400>; > + interrupts = <0 2 4>; @@ -382,7 +382,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + uart3: serial@01c28c00 { +> + uart3: serial at 01c28c00 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x01c28c00 0x400>; > + interrupts = <0 3 4>; @@ -393,7 +393,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + uart4: serial@01c29000 { +> + uart4: serial at 01c29000 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x01c29000 0x400>; > + interrupts = <0 4 4>; @@ -404,7 +404,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + i2c0: i2c@01c2ac00 { +> + i2c0: i2c at 01c2ac00 { > + compatible = "allwinner,sun6i-a31-i2c"; > + reg = <0x01c2ac00 0x400>; > + interrupts = <0 6 4>; @@ -414,7 +414,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + i2c1: i2c@01c2b000 { +> + i2c1: i2c at 01c2b000 { > + compatible = "allwinner,sun6i-a31-i2c"; > + reg = <0x01c2b000 0x400>; > + interrupts = <0 7 4>; @@ -424,7 +424,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + i2c2: i2c@01c2b400 { +> + i2c2: i2c at 01c2b400 { > + compatible = "allwinner,sun6i-a31-i2c"; > + reg = <0x01c2b400 0x400>; > + interrupts = <0 8 4>; @@ -434,7 +434,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + spi0: spi@01c68000 { +> + spi0: spi at 01c68000 { > + compatible = "allwinner,sun6i-a31-spi"; > + reg = <0x01c68000 0x1000>; > + interrupts = <0 65 4>; @@ -444,7 +444,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + spi1: spi@01c69000 { +> + spi1: spi at 01c69000 { > + compatible = "allwinner,sun6i-a31-spi"; > + reg = <0x01c69000 0x1000>; > + interrupts = <0 66 4>; @@ -454,7 +454,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + gic: interrupt-controller@01c81000 { +> + gic: interrupt-controller at 01c81000 { > + compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; > + reg = <0x01c81000 0x1000>, > + <0x01c82000 0x1000>; @@ -462,7 +462,7 @@ It doesn't look to be ordered by physical address. > + #interrupt-cells = <3>; > + }; > + -> + nmi_intc: interrupt-controller@01f00c0c { +> + nmi_intc: interrupt-controller at 01f00c0c { > + compatible = "allwinner,sun6i-a31-sc-nmi"; > + interrupt-controller; > + #interrupt-cells = <2>; @@ -470,7 +470,7 @@ It doesn't look to be ordered by physical address. > + interrupts = <0 32 4>; > + }; > + -> + prcm@01f01400 { +> + prcm at 01f01400 { > + compatible = "allwinner,sun8i-a23-prcm"; > + reg = <0x01f01400 0x200>; > + @@ -515,12 +515,12 @@ It doesn't look to be ordered by physical address. > + }; > + }; > + -> + cpucfg@01f01c00 { +> + cpucfg at 01f01c00 { > + compatible = "allwinner,sun8i-a23-cpuconfig"; > + reg = <0x01f01c00 0x300>; > + }; > + -> + r_uart: serial@01f02800 { +> + r_uart: serial at 01f02800 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x01f02800 0x400>; > + interrupts = <0 38 4>; @@ -531,7 +531,7 @@ It doesn't look to be ordered by physical address. > + status = "disabled"; > + }; > + -> + r_pio: pinctrl@01f02c00 { +> + r_pio: pinctrl at 01f02c00 { > + compatible = "allwinner,sun8i-a23-r-pinctrl"; > + reg = <0x01f02c00 0x400>; > + interrupts = <0 45 4>; @@ -543,7 +543,7 @@ It doesn't look to be ordered by physical address. > + #size-cells = <0>; > + #gpio-cells = <3>; > + -> + r_uart_pins_a: r_uart@0 { +> + r_uart_pins_a: r_uart at 0 { > + allwinner,pins = "PL2", "PL3"; > + allwinner,function = "s_uart"; > + allwinner,drive = <0>; @@ -561,3 +561,10 @@ Maxime Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com +-------------- next part -------------- +A non-text attachment was scrubbed... +Name: signature.asc +Type: application/pgp-signature +Size: 819 bytes +Desc: Digital signature +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140525/1130fc21/attachment.sig> diff --git a/a/2.bin b/a/2.bin deleted file mode 100644 index 04a3824..0000000 --- a/a/2.bin +++ /dev/null @@ -1,17 +0,0 @@ ------BEGIN PGP SIGNATURE----- -Version: GnuPG v1 - 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signature diff --git a/a/content_digest b/N1/content_digest index 160dde7..1517eae 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,24 +1,10 @@ "ref\01400831485-28576-1-git-send-email-wens@csie.org\0" "ref\01400831485-28576-22-git-send-email-wens@csie.org\0" - "From\0Maxime Ripard <maxime.ripard@free-electrons.com>\0" - "Subject\0Re: [PATCH 21/22] ARM: sunxi: Add Allwinner A23 dtsi\0" + "From\0maxime.ripard@free-electrons.com (Maxime Ripard)\0" + "Subject\0[PATCH 21/22] ARM: sunxi: Add Allwinner A23 dtsi\0" "Date\0Sun, 25 May 2014 21:38:45 +0200\0" - "To\0Chen-Yu Tsai <wens@csie.org>\0" - "Cc\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>" - Samuel Ortiz <sameo@linux.intel.com> - Lee Jones <lee.jones@linaro.org> - Rob Herring <robh+dt@kernel.org> - Mike Turquette <mturquette@linaro.org> - Emilio Lopez <emilio@elopez.com.ar> - Linus Walleij <linus.walleij@linaro.org> - linux-serial@vger.kernel.org - linux-arm-kernel@lists.infradead.org - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - Hans de Goede <hdegoede@redhat.com> - Boris BREZILLON <boris.brezillon@free-electrons.com> - " Luc Verhaegen <libv@skynet.be>\0" - "\01:1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "On Fri, May 23, 2014 at 03:51:24PM +0800, Chen-Yu Tsai wrote:\n" "> The Allwinner A23 is a tablet oriented SoC with 2 Cortex-A7 cores\n" @@ -69,14 +55,14 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tcpu@0 {\n" + "> +\t\tcpu at 0 {\n" "> +\t\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\treg = <0>;\n" "> +\t\t\tclocks = <&cpu>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpu@1 {\n" + "> +\t\tcpu at 1 {\n" "> +\t\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\treg = <1>;\n" @@ -124,7 +110,7 @@ "> +\t\t\tclock-output-names = \"osc32k\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tpll1: clk@01c20000 {\n" + "> +\t\tpll1: clk at 01c20000 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun8i-a23-pll1-clk\";\n" "> +\t\t\treg = <0x01c20000 0x4>;\n" @@ -132,7 +118,7 @@ "> +\t\t\tclock-output-names = \"pll1\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tpll6: clk@01c20028 {\n" + "> +\t\tpll6: clk at 01c20028 {\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-pll6-clk\";\n" "> +\t\t\treg = <0x01c20028 0x4>;\n" @@ -140,7 +126,7 @@ "> +\t\t\tclock-output-names = \"pll6_other\", \"pll6\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpu: cpu_clk@01c20050 {\n" + "> +\t\tcpu: cpu_clk at 01c20050 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-cpu-clk\";\n" "> +\t\t\treg = <0x01c20050 0x4>;\n" @@ -155,7 +141,7 @@ "> +\t\t\tclock-output-names = \"cpu\";\n" "> +\t\t};\n" "> +\n" - "> +\t\taxi: axi_clk@01c20050 {\n" + "> +\t\taxi: axi_clk at 01c20050 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\t/*\n" "> +\t\t\t * AXI clock on A23 is actually wider,\n" @@ -171,7 +157,7 @@ "> +\t\t\tclock-output-names = \"axi\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tahb1_pll6: ahb1_pll6_clk@01c20054 {\n" + "> +\t\tahb1_pll6: ahb1_pll6_clk at 01c20054 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-ahb1-pll6-clk\";\n" "> +\t\t\treg = <0x01c20054 0x4>;\n" @@ -179,7 +165,7 @@ "> +\t\t\tclock-output-names = \"ahb1_pll6\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tahb1_mux: ahb1_mux_clk@01c20054 {\n" + "> +\t\tahb1_mux: ahb1_mux_clk at 01c20054 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-ahb1-mux-clk\";\n" "> +\t\t\treg = <0x01c20054 0x4>;\n" @@ -187,7 +173,7 @@ "> +\t\t\tclock-output-names = \"ahb1_mux\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tahb1: ahb1_clk@01c20054 {\n" + "> +\t\tahb1: ahb1_clk at 01c20054 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-ahb-clk\";\n" "> +\t\t\treg = <0x01c20054 0x4>;\n" @@ -195,7 +181,7 @@ "> +\t\t\tclock-output-names = \"ahb1\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tahb1_gates: clk@01c20060 {\n" + "> +\t\tahb1_gates: clk at 01c20060 {\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun8i-a23-ahb1-gates-clk\";\n" "> +\t\t\treg = <0x01c20060 0x8>;\n" @@ -211,7 +197,7 @@ "> +\t\t\t\t\t\"ahb1_drc\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb1: apb1_clk@01c20054 {\n" + "> +\t\tapb1: apb1_clk at 01c20054 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-apb0-clk\";\n" "> +\t\t\treg = <0x01c20054 0x4>;\n" @@ -219,7 +205,7 @@ "> +\t\t\tclock-output-names = \"apb1\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb1_gates: clk@01c20068 {\n" + "> +\t\tapb1_gates: clk at 01c20068 {\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun8i-a23-apb1-gates-clk\";\n" "> +\t\t\treg = <0x01c20068 0x4>;\n" @@ -228,7 +214,7 @@ "> +\t\t\t\t\t\"apb1_daudio0\",\t\"apb1_daudio1\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb2_mux: apb2_mux@01c20058 {\n" + "> +\t\tapb2_mux: apb2_mux at 01c20058 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-apb1-mux-clk\";\n" "> +\t\t\treg = <0x01c20058 0x4>;\n" @@ -238,7 +224,7 @@ "\n" "It doesn't look to be ordered by physical address. \n" "\n" - "> +\t\tapb2: apb2@01c20058 {\n" + "> +\t\tapb2: apb2 at 01c20058 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-apb2-div-clk\";\n" "> +\t\t\treg = <0x01c20058 0x4>;\n" @@ -246,7 +232,7 @@ "> +\t\t\tclock-output-names = \"apb2\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb2_gates: clk@01c2006c {\n" + "> +\t\tapb2_gates: clk at 01c2006c {\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun8i-a23-apb2-gates-clk\";\n" "> +\t\t\treg = <0x01c2006c 0x4>;\n" @@ -257,7 +243,7 @@ "> +\t\t\t\t\t\"apb2_uart3\", \"apb2_uart4\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tmmc0_clk: clk@01c20088 {\n" + "> +\t\tmmc0_clk: clk at 01c20088 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-mod0-clk\";\n" "> +\t\t\treg = <0x01c20088 0x4>;\n" @@ -265,7 +251,7 @@ "> +\t\t\tclock-output-names = \"mmc0\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tmmc1_clk: clk@01c2008c {\n" + "> +\t\tmmc1_clk: clk at 01c2008c {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-mod0-clk\";\n" "> +\t\t\treg = <0x01c2008c 0x4>;\n" @@ -273,7 +259,7 @@ "> +\t\t\tclock-output-names = \"mmc1\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tmmc2_clk: clk@01c20090 {\n" + "> +\t\tmmc2_clk: clk at 01c20090 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-mod0-clk\";\n" "> +\t\t\treg = <0x01c20090 0x4>;\n" @@ -281,7 +267,7 @@ "> +\t\t\tclock-output-names = \"mmc2\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tspi0_clk: clk@01c200a0 {\n" + "> +\t\tspi0_clk: clk at 01c200a0 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-mod0-clk\";\n" "> +\t\t\treg = <0x01c200a0 0x4>;\n" @@ -289,7 +275,7 @@ "> +\t\t\tclock-output-names = \"spi0\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tspi1_clk: clk@01c200a4 {\n" + "> +\t\tspi1_clk: clk at 01c200a4 {\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-mod0-clk\";\n" "> +\t\t\treg = <0x01c200a4 0x4>;\n" @@ -298,13 +284,13 @@ "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tsoc@01c00000 {\n" + "> +\tsoc at 01c00000 {\n" "> +\t\tcompatible = \"simple-bus\";\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <1>;\n" "> +\t\tranges;\n" "> +\n" - "> +\t\tpio: pinctrl@01c20800 {\n" + "> +\t\tpio: pinctrl at 01c20800 {\n" "> +\t\t\tcompatible = \"allwinner,sun8i-a23-pinctrl\";\n" "> +\t\t\treg = <0x01c20800 0x400>;\n" "> +\t\t\tinterrupts = <0 11 4>,\n" @@ -317,21 +303,21 @@ "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\t#gpio-cells = <3>;\n" "> +\n" - "> +\t\t\tuart0_pins_a: uart0@0 {\n" + "> +\t\t\tuart0_pins_a: uart0 at 0 {\n" "> +\t\t\t\tallwinner,pins = \"PF2\", \"PF4\";\n" "> +\t\t\t\tallwinner,function = \"uart0\";\n" "> +\t\t\t\tallwinner,drive = <0>;\n" "> +\t\t\t\tallwinner,pull = <0>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c0_pins_a: i2c0@0 {\n" + "> +\t\t\ti2c0_pins_a: i2c0 at 0 {\n" "> +\t\t\t\tallwinner,pins = \"PH2\", \"PH3\";\n" "> +\t\t\t\tallwinner,function = \"i2c0\";\n" "> +\t\t\t\tallwinner,drive = <0>;\n" "> +\t\t\t\tallwinner,pull = <0>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c1_pins_a: i2c1@0 {\n" + "> +\t\t\ti2c1_pins_a: i2c1 at 0 {\n" "> +\t\t\t\tallwinner,pins = \"PH4\", \"PH5\";\n" "> +\t\t\t\tallwinner,function = \"i2c1\";\n" "> +\t\t\t\tallwinner,drive = <0>;\n" @@ -339,25 +325,25 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tahb1_rst: reset@01c202c0 {\n" + "> +\t\tahb1_rst: reset at 01c202c0 {\n" "> +\t\t\t#reset-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-ahb1-reset\";\n" "> +\t\t\treg = <0x01c202c0 0xc>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb1_rst: reset@01c202d0 {\n" + "> +\t\tapb1_rst: reset at 01c202d0 {\n" "> +\t\t\t#reset-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-clock-reset\";\n" "> +\t\t\treg = <0x01c202d0 0x4>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb2_rst: reset@01c202d8 {\n" + "> +\t\tapb2_rst: reset at 01c202d8 {\n" "> +\t\t\t#reset-cells = <1>;\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-clock-reset\";\n" "> +\t\t\treg = <0x01c202d8 0x4>;\n" "> +\t\t};\n" "> +\n" - "> +\t\ttimer@01c20c00 {\n" + "> +\t\ttimer at 01c20c00 {\n" "> +\t\t\tcompatible = \"allwinner,sun4i-a10-timer\";\n" "> +\t\t\treg = <0x01c20c00 0xa0>;\n" "> +\t\t\tinterrupts = <0 18 4>,\n" @@ -365,13 +351,13 @@ "> +\t\t\tclocks = <&osc24M>;\n" "> +\t\t};\n" "> +\n" - "> +\t\twdt0: watchdog@01c20ca0 {\n" + "> +\t\twdt0: watchdog at 01c20ca0 {\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-wdt\";\n" "> +\t\t\treg = <0x01c20ca0 0x20>;\n" "> +\t\t\tinterrupts = <0 25 4>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tuart0: serial@01c28000 {\n" + "> +\t\tuart0: serial at 01c28000 {\n" "> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\treg = <0x01c28000 0x400>;\n" "> +\t\t\tinterrupts = <0 0 4>;\n" @@ -382,7 +368,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tuart1: serial@01c28400 {\n" + "> +\t\tuart1: serial at 01c28400 {\n" "> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\treg = <0x01c28400 0x400>;\n" "> +\t\t\tinterrupts = <0 1 4>;\n" @@ -393,7 +379,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tuart2: serial@01c28800 {\n" + "> +\t\tuart2: serial at 01c28800 {\n" "> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\treg = <0x01c28800 0x400>;\n" "> +\t\t\tinterrupts = <0 2 4>;\n" @@ -404,7 +390,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tuart3: serial@01c28c00 {\n" + "> +\t\tuart3: serial at 01c28c00 {\n" "> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\treg = <0x01c28c00 0x400>;\n" "> +\t\t\tinterrupts = <0 3 4>;\n" @@ -415,7 +401,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tuart4: serial@01c29000 {\n" + "> +\t\tuart4: serial at 01c29000 {\n" "> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\treg = <0x01c29000 0x400>;\n" "> +\t\t\tinterrupts = <0 4 4>;\n" @@ -426,7 +412,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c0: i2c@01c2ac00 {\n" + "> +\t\ti2c0: i2c at 01c2ac00 {\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-i2c\";\n" "> +\t\t\treg = <0x01c2ac00 0x400>;\n" "> +\t\t\tinterrupts = <0 6 4>;\n" @@ -436,7 +422,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c1: i2c@01c2b000 {\n" + "> +\t\ti2c1: i2c at 01c2b000 {\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-i2c\";\n" "> +\t\t\treg = <0x01c2b000 0x400>;\n" "> +\t\t\tinterrupts = <0 7 4>;\n" @@ -446,7 +432,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c2: i2c@01c2b400 {\n" + "> +\t\ti2c2: i2c at 01c2b400 {\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-i2c\";\n" "> +\t\t\treg = <0x01c2b400 0x400>;\n" "> +\t\t\tinterrupts = <0 8 4>;\n" @@ -456,7 +442,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tspi0: spi@01c68000 {\n" + "> +\t\tspi0: spi at 01c68000 {\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-spi\";\n" "> +\t\t\treg = <0x01c68000 0x1000>;\n" "> +\t\t\tinterrupts = <0 65 4>;\n" @@ -466,7 +452,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tspi1: spi@01c69000 {\n" + "> +\t\tspi1: spi at 01c69000 {\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-spi\";\n" "> +\t\t\treg = <0x01c69000 0x1000>;\n" "> +\t\t\tinterrupts = <0 66 4>;\n" @@ -476,7 +462,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgic: interrupt-controller@01c81000 {\n" + "> +\t\tgic: interrupt-controller at 01c81000 {\n" "> +\t\t\tcompatible = \"arm,cortex-a7-gic\", \"arm,cortex-a15-gic\";\n" "> +\t\t\treg = <0x01c81000 0x1000>,\n" "> +\t\t\t <0x01c82000 0x1000>;\n" @@ -484,7 +470,7 @@ "> +\t\t\t#interrupt-cells = <3>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tnmi_intc: interrupt-controller@01f00c0c {\n" + "> +\t\tnmi_intc: interrupt-controller at 01f00c0c {\n" "> +\t\t\tcompatible = \"allwinner,sun6i-a31-sc-nmi\";\n" "> +\t\t\tinterrupt-controller;\n" "> +\t\t\t#interrupt-cells = <2>;\n" @@ -492,7 +478,7 @@ "> +\t\t\tinterrupts = <0 32 4>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tprcm@01f01400 {\n" + "> +\t\tprcm at 01f01400 {\n" "> +\t\t\tcompatible = \"allwinner,sun8i-a23-prcm\";\n" "> +\t\t\treg = <0x01f01400 0x200>;\n" "> +\n" @@ -537,12 +523,12 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpucfg@01f01c00 {\n" + "> +\t\tcpucfg at 01f01c00 {\n" "> +\t\t\tcompatible = \"allwinner,sun8i-a23-cpuconfig\";\n" "> +\t\t\treg = <0x01f01c00 0x300>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tr_uart: serial@01f02800 {\n" + "> +\t\tr_uart: serial at 01f02800 {\n" "> +\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\treg = <0x01f02800 0x400>;\n" "> +\t\t\tinterrupts = <0 38 4>;\n" @@ -553,7 +539,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tr_pio: pinctrl@01f02c00 {\n" + "> +\t\tr_pio: pinctrl at 01f02c00 {\n" "> +\t\t\tcompatible = \"allwinner,sun8i-a23-r-pinctrl\";\n" "> +\t\t\treg = <0x01f02c00 0x400>;\n" "> +\t\t\tinterrupts = <0 45 4>;\n" @@ -565,7 +551,7 @@ "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\t#gpio-cells = <3>;\n" "> +\n" - "> +\t\t\tr_uart_pins_a: r_uart@0 {\n" + "> +\t\t\tr_uart_pins_a: r_uart at 0 {\n" "> +\t\t\t\tallwinner,pins = \"PL2\", \"PL3\";\n" "> +\t\t\t\tallwinner,function = \"s_uart\";\n" "> +\t\t\t\tallwinner,drive = <0>;\n" @@ -582,27 +568,13 @@ "-- \n" "Maxime Ripard, Free Electrons\n" "Embedded Linux, Kernel and Android engineering\n" - http://free-electrons.com - "\01:2\0" - "fn\0signature.asc\0" - "d\0Digital signature\0" - "b\0" - "-----BEGIN PGP SIGNATURE-----\n" - "Version: GnuPG v1\n" - "\n" - "iQIcBAEBAgAGBQJTgkbFAAoJEBx+YmzsjxAg1GAQAItJPVZCNs8cdD60dL9IvwzJ\n" - "hUj5+AqNZOMFOtMQdoKIVXljnPlrjrvQvB0H+9t/G2sdXWkFFVbJ2lvKm+kaHGs/\n" - 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This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.