From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] net: hisilicon: add hix5hd2 mac driver
Date: Mon, 26 May 2014 16:51:15 +0200 [thread overview]
Message-ID: <201405261651.15998.arnd@arndb.de> (raw)
In-Reply-To: <1400504227-12047-4-git-send-email-zhangfei.gao@linaro.org>
On Monday 19 May 2014, Zhangfei Gao wrote:
I only noticed one real issue with the driver:
> +struct hix5hd2_desc {
> + __le32 buff_addr;
> + __le32 buff_len:11;
> + __le32 reserve2:5;
> + __le32 data_len:11;
> + __le32 reserve1:2;
> + __le32 fl:2;
> + __le32 descvid:1;
> +} __aligned(32);
> +
You should generall not use bitfields in hardware data structures, as that is
not endian safe and will prevent running a big-endian kernel on this machine.
Better convert this to a set of __le32 fields and explicit shifts and masks.
Two smaller things you should think about, I'm not entirely sure about these:
> +static int hix5hd2_rx(struct net_device *dev, int limit)
> +{
> + struct hix5hd2_priv *priv = netdev_priv(dev);
> + struct sk_buff *skb;
> + struct hix5hd2_desc *desc;
> + dma_addr_t dma_addr;
> + u32 start, end, num, pos, i, len;
> +
> + /* software read pointer */
> + start = dma_cnt(readl_relaxed(priv->base + RX_BQ_RD_ADDR));
> + /* logic write pointer */
> + end = dma_cnt(readl_relaxed(priv->base + RX_BQ_WR_ADDR));
I think one of these needs to be readl() instead of readl_relaxed(),
to ensure the data is correctly ordered with regard to the pointer
access.
> + if (pos != start)
> + writel(dma_byte(pos), priv->base + TX_RQ_RD_ADDR);
While this looks like it could be writel_relaxed().
Arnd
WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@arndb.de>
To: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: davem@davemloft.net, f.fainelli@gmail.com,
sergei.shtylyov@cogentembedded.com, mark.rutland@arm.com,
David.Laight@aculab.com, eric.dumazet@gmail.com,
haifeng.yan@linaro.org, jchxue@gmail.com,
linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 3/3] net: hisilicon: add hix5hd2 mac driver
Date: Mon, 26 May 2014 16:51:15 +0200 [thread overview]
Message-ID: <201405261651.15998.arnd@arndb.de> (raw)
In-Reply-To: <1400504227-12047-4-git-send-email-zhangfei.gao@linaro.org>
On Monday 19 May 2014, Zhangfei Gao wrote:
I only noticed one real issue with the driver:
> +struct hix5hd2_desc {
> + __le32 buff_addr;
> + __le32 buff_len:11;
> + __le32 reserve2:5;
> + __le32 data_len:11;
> + __le32 reserve1:2;
> + __le32 fl:2;
> + __le32 descvid:1;
> +} __aligned(32);
> +
You should generall not use bitfields in hardware data structures, as that is
not endian safe and will prevent running a big-endian kernel on this machine.
Better convert this to a set of __le32 fields and explicit shifts and masks.
Two smaller things you should think about, I'm not entirely sure about these:
> +static int hix5hd2_rx(struct net_device *dev, int limit)
> +{
> + struct hix5hd2_priv *priv = netdev_priv(dev);
> + struct sk_buff *skb;
> + struct hix5hd2_desc *desc;
> + dma_addr_t dma_addr;
> + u32 start, end, num, pos, i, len;
> +
> + /* software read pointer */
> + start = dma_cnt(readl_relaxed(priv->base + RX_BQ_RD_ADDR));
> + /* logic write pointer */
> + end = dma_cnt(readl_relaxed(priv->base + RX_BQ_WR_ADDR));
I think one of these needs to be readl() instead of readl_relaxed(),
to ensure the data is correctly ordered with regard to the pointer
access.
> + if (pos != start)
> + writel(dma_byte(pos), priv->base + TX_RQ_RD_ADDR);
While this looks like it could be writel_relaxed().
Arnd
next prev parent reply other threads:[~2014-05-26 14:51 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-19 12:57 [PATCH 0/3] add hix5hd2 mac driver Zhangfei Gao
2014-05-19 12:57 ` Zhangfei Gao
2014-05-19 12:57 ` [PATCH 1/3] hix5hd2-clock: add complex clk Zhangfei Gao
2014-05-19 12:57 ` Zhangfei Gao
2014-05-19 13:11 ` David Laight
2014-05-19 13:11 ` David Laight
2014-05-20 12:02 ` zhangfei
2014-05-20 12:02 ` zhangfei
2014-05-19 12:57 ` [PATCH 2/3] Documentation: add Device tree bindings for Hisilicon hix5hd2 ethernet Zhangfei Gao
2014-05-19 12:57 ` Zhangfei Gao
2014-05-19 16:26 ` Sergei Shtylyov
2014-05-19 16:26 ` Sergei Shtylyov
2014-05-20 2:12 ` zhangfei
2014-05-20 2:12 ` zhangfei
2014-05-19 12:57 ` [PATCH 3/3] net: hisilicon: add hix5hd2 mac driver Zhangfei Gao
2014-05-19 12:57 ` Zhangfei Gao
2014-05-25 12:25 ` zhangfei
2014-05-25 12:25 ` zhangfei
2014-05-26 14:51 ` Arnd Bergmann [this message]
2014-05-26 14:51 ` Arnd Bergmann
2014-05-27 3:57 ` zhangfei
2014-05-27 3:57 ` zhangfei
2014-05-27 13:25 ` Arnd Bergmann
2014-05-27 13:25 ` Arnd Bergmann
2014-05-28 5:17 ` zhangfei
2014-05-28 5:17 ` zhangfei
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