From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Arun Murthy <arunrmurthy.83@gmail.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2 01/16] drm/i915: Keep vblank interrupts enabled while enabling/disabling planes
Date: Tue, 10 Jun 2014 19:22:49 +0300 [thread overview]
Message-ID: <20140610162249.GE27580@intel.com> (raw)
In-Reply-To: <CAAnUQp0zGsTdXTSgS_Hg6kPbVQ1fDTGpsaAm5svugobmaqi91g@mail.gmail.com>
On Wed, Jun 04, 2014 at 11:30:47AM +0530, Arun Murthy wrote:
> On Mon, May 26, 2014 at 7:26 PM, Daniel Vetter <daniel@ffwll.ch> wrote:
> > On Thu, May 22, 2014 at 05:48:06PM +0300, ville.syrjala@linux.intel.com wrote:
> >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> Because of the upcoming vblank interrupt driven watermark update
> >> mechanism we will have use for vblank interrupts during plane
> >> enabling/disabling. So don't call drm_vblank_off() until planes
> >> are off, and call drm_vblank_on() just before we start to enable
> >> the planes.
>
> Since watermark and display control registers are double buffered
> both of them get updated on next blank and hence in sync.
> Can you let me know the need for vblank driven watermark updates?
Watermark registers aren't double buffered.
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2014-06-10 16:23 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-22 14:48 [PATCH v2 00/16] drm/i915: Two part watermark update for ILK+, part 2 ville.syrjala
2014-05-22 14:48 ` [PATCH v2 01/16] drm/i915: Keep vblank interrupts enabled while enabling/disabling planes ville.syrjala
2014-05-26 13:56 ` Daniel Vetter
2014-06-04 6:00 ` Arun Murthy
2014-06-10 16:22 ` Ville Syrjälä [this message]
2014-05-22 14:48 ` [PATCH 02/16] drm/i915: Leave interrupts enabled while disabling crtcs during suspend ville.syrjala
2014-05-22 14:48 ` [PATCH 03/16] drm/i915: Check hw vs. sw watermark state after programming ville.syrjala
2014-05-22 14:48 ` [PATCH 04/16] drm/i915: Refactor ilk_validate_pipe_wm() ville.syrjala
2014-05-22 14:48 ` [PATCH v2 05/16] drm/i915: Refactor ilk_update_wm ville.syrjala
2014-05-22 14:48 ` [PATCH 06/16] drm/i915: Add dev_priv->wm.mutex ville.syrjala
2014-05-22 14:48 ` [PATCH v2 07/16] drm/i915: Add vblank based delayed watermark update mechanism ville.syrjala
2014-06-03 18:50 ` Paulo Zanoni
2014-06-03 19:32 ` Ville Syrjälä
2014-06-04 14:01 ` Paulo Zanoni
2014-06-04 16:10 ` Daniel Vetter
2014-06-09 15:01 ` Ville Syrjälä
2014-05-22 14:48 ` [PATCH v2 08/16] drm/i915: Split watermark programming into pre and post steps ville.syrjala
2014-06-03 20:51 ` Paulo Zanoni
2014-06-04 16:22 ` Daniel Vetter
2014-06-09 17:03 ` Ville Syrjälä
2014-06-10 11:46 ` Jani Nikula
2014-05-22 14:48 ` [PATCH v2 09/16] drm/i915: Actually perform the watermark update in two phases ville.syrjala
2014-06-03 22:47 ` Paulo Zanoni
2014-06-09 18:28 ` Ville Syrjälä
2014-05-22 14:48 ` [PATCH v2 10/16] drm/i915: Wait for watermark updates to finish before disabling a pipe ville.syrjala
2014-06-04 13:54 ` Paulo Zanoni
2014-05-22 14:48 ` [PATCH 11/16] drm/i915: Refactor get_other_active_crtc() ville.syrjala
2014-06-04 16:59 ` Paulo Zanoni
2014-05-22 14:48 ` [PATCH 12/16] drm/i915: Disable LP1+ watermarks while changing the number of active pipes ville.syrjala
2014-06-04 18:24 ` Paulo Zanoni
2014-06-09 16:51 ` Ville Syrjälä
2014-05-22 14:48 ` [PATCH v2 13/16] drm/i915: Keep track of who disabled LP1+ watermarks ville.syrjala
2014-06-04 18:30 ` Paulo Zanoni
2014-05-22 14:48 ` [PATCH 14/16] drm/i915: Prefer the 5/6 DDB split when primary is disabled ville.syrjala
2014-06-04 18:34 ` Paulo Zanoni
2014-05-22 14:48 ` [PATCH 15/16] drm/i915: Add a workaround for sprite only <-> primary only switching ville.syrjala
2014-06-04 18:44 ` Paulo Zanoni
2014-05-22 14:48 ` [PATCH 16/16] drm/i915: Don't disable LP1+ watermarks for every frame when scaled ville.syrjala
2014-06-04 18:49 ` Paulo Zanoni
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