From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andy Gross Subject: Re: [RFC PATCH 1/2] soc: qcom: do not disable the iface clock in probe Date: Tue, 10 Jun 2014 12:46:56 -0500 Message-ID: <20140610174656.GA10275@qualcomm.com> References: <1402410678-12931-1-git-send-email-srinivas.kandagatla@linaro.org> <1402410717-12977-1-git-send-email-srinivas.kandagatla@linaro.org> <6D685866-4AE5-458B-BB8C-EFEBAE221A9E@codeaurora.org> <539742B6.7030303@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from smtp.codeaurora.org ([198.145.11.231]:56234 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751820AbaFJRq6 (ORCPT ); Tue, 10 Jun 2014 13:46:58 -0400 Content-Disposition: inline In-Reply-To: <539742B6.7030303@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Stephen Boyd Cc: Kumar Gala , Srinivas Kandagatla , linux-arm-msm , Mike Turquette On Tue, Jun 10, 2014 at 10:39:02AM -0700, Stephen Boyd wrote: > >> diff --git a/drivers/soc/qcom/qcom_gsbi.c b/drivers/soc/qcom/qcom_gsbi.c > >> index ab7b441..64fb298 100644 > >> --- a/drivers/soc/qcom/qcom_gsbi.c > >> +++ b/drivers/soc/qcom/qcom_gsbi.c > >> @@ -22,44 +22,63 @@ > >> #define GSBI_CTRL_REG 0x0000 > >> #define GSBI_PROTOCOL_SHIFT 4 > >> > >> +struct gsbi_info { > >> + struct clk *hclk; > >> + u32 mode; > >> + u32 crci; > >> +}; > > What does mode and crci have to do with this patch? Can't we just put > the clock into the platform data? I second this notion. -- sent by an employee of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation