From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH igt 4/4] tools/intel_poller: Add a new tool that will poll various display registers Date: Thu, 12 Jun 2014 09:21:29 +0200 Message-ID: <20140612072129.GT5821@phenom.ffwll.local> References: <1402504880-27525-1-git-send-email-ville.syrjala@linux.intel.com> <1402504880-27525-4-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-we0-f177.google.com (mail-we0-f177.google.com [74.125.82.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 9CC406E8DF for ; Thu, 12 Jun 2014 00:21:36 -0700 (PDT) Received: by mail-we0-f177.google.com with SMTP id u56so797929wes.36 for ; Thu, 12 Jun 2014 00:21:35 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1402504880-27525-4-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Jun 11, 2014 at 07:41:20PM +0300, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > intel_poller can be used to poll various display registers > (IIR,scanline/pixel/flip/frame counter, live address, etc.). > = > It can be used to determine eg. at which scanline or pixel count certain > events occur. > = > Signed-off-by: Ville Syrj=E4l=E4 > --- > = > Ideas for a better name are welcome! intel_display_poller maybe since the use-case is display specific. But not really important imo. -Daniel > = > = > lib/intel_reg.h | 22 +- > tools/Makefile.sources | 1 + > tools/intel_poller.c | 1471 ++++++++++++++++++++++++++++++++++++++++++= ++++++ > 3 files changed, 1491 insertions(+), 3 deletions(-) > create mode 100644 tools/intel_poller.c > = > diff --git a/lib/intel_reg.h b/lib/intel_reg.h > index 84e05e4..87a14c9 100644 > --- a/lib/intel_reg.h > +++ b/lib/intel_reg.h > @@ -2248,7 +2248,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTW= ARE. > */ > #define PIPE_PIXEL_MASK 0x00ffffff > #define PIPE_PIXEL_SHIFT 0 > - > +/* > + * g4x+ frame/flip counters > + */ > +#define PIPEAFRMCOUNT_G4X 0x70040 > +#define PIPEAFLIPCOUNT_G4X 0x70044 > /* > * Computing GMCH M and N values. > * > @@ -2296,20 +2300,24 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFT= WARE. > #define PIPEBSTAT 0x71024 > #define PIPEBFRAMEHIGH 0x71040 > #define PIPEBFRAMEPIXEL 0x71044 > +#define PIPEBFRMCOUNT_G4X 0x71040 > +#define PIPEBFLIPCOUNT_G4X 0x71044 > = > #define PIPEB_GMCH_DATA_M 0x71050 > #define PIPEB_GMCH_DATA_N 0x71054 > #define PIPEB_DP_LINK_M 0x71060 > #define PIPEB_DP_LINK_N 0x71064 > = > +#define PIPEC_DSL 0x72000 > + > #define PIPECCONF 0x72008 > = > #define PIPECGCMAXRED 0x72010 > #define PIPECGCMAXGREEN 0x72014 > #define PIPECGCMAXBLUE 0x72018 > #define PIPECSTAT 0x72024 > -#define PIPECFRAMEHIGH 0x72040 > -#define PIPECFRAMEPIXEL 0x72044 > +#define PIPECFRMCOUNT_G4X 0x72040 > +#define PIPECFLIPCOUNT_G4X 0x72044 > = > #define PIPEC_GMCH_DATA_M 0x72050 > #define PIPEC_GMCH_DATA_N 0x72054 > @@ -2370,12 +2378,15 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFT= WARE. > = > #define DSPASURF 0x7019C > #define DSPATILEOFF 0x701A4 > +#define DSPASURFLIVE 0x701AC > = > #define DSPBSURF 0x7119C > #define DSPBTILEOFF 0x711A4 > +#define DSPBSURFLIVE 0x711AC > = > #define DSPCSURF 0x7219C > #define DSPCTILEOFF 0x721A4 > +#define DSPCSURFLIVE 0x721AC > = > #define VGACNTRL 0x71400 > # define VGA_DISP_DISABLE (1 << 31) > @@ -2879,6 +2890,11 @@ typedef enum { > #define DEIIR 0x44008 > #define DEIER 0x4400c > = > +#define GEN8_DE_PIPE_ISR(pipe) (0x44400 + 0x10 * (pipe)) > +#define GEN8_DE_PIPE_IMR(pipe) (0x44404 + 0x10 * (pipe)) > +#define GEN8_DE_PIPE_IIR(pipe) (0x44408 + 0x10 * (pipe)) > +#define GEN8_DE_PIPE_IER(pipe) (0x4440c + 0x10 * (pipe)) > + > /* GT interrupt */ > #define GT_SYNC_STATUS (1 << 2) > #define GT_USER_INTERRUPT (1 << 0) > diff --git a/tools/Makefile.sources b/tools/Makefile.sources > index c2535e7..6f6ca4a 100644 > --- a/tools/Makefile.sources > +++ b/tools/Makefile.sources > @@ -12,6 +12,7 @@ bin_PROGRAMS =3D \ > intel_iosf_sb_write \ > intel_opregion_decode \ > intel_perf_counters \ > + intel_poller \ > intel_stepping \ > intel_reg_checker \ > intel_reg_dumper \ > diff --git a/tools/intel_poller.c b/tools/intel_poller.c > new file mode 100644 > index 0000000..ebc594a > --- /dev/null > +++ b/tools/intel_poller.c > @@ -0,0 +1,1471 @@ > +/* > + * Copyright =A9 2014 Intel Corporation > + * > + * Permission is hereby granted, free of charge, to any person obtaining= a > + * copy of this software and associated documentation files (the "Softwa= re"), > + * to deal in the Software without restriction, including without limita= tion > + * the rights to use, copy, modify, merge, publish, distribute, sublicen= se, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice (including the = next > + * paragraph) shall be included in all copies or substantial portions of= the > + * Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRE= SS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILI= TY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SH= ALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR = OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISI= NG > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER > + * DEALINGS IN THE SOFTWARE. > + * > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include "intel_chipset.h" > +#include "intel_io.h" > +#include "igt_debugfs.h" > +#include "drmtest.h" > + > +#define min(a,b) ((a) < (b) ? (a) : (b)) > +#define max(a,b) ((a) > (b) ? (a) : (b)) > + > +enum test { > + TEST_INVALID, > + TEST_PIPESTAT, > + TEST_IIR, > + TEST_IIR_GEN2, > + TEST_IIR_GEN3, > + TEST_DEIIR, > + TEST_FRAMECOUNT, > + TEST_FRAMECOUNT_GEN3, > + TEST_FRAMECOUNT_G4X, > + TEST_FLIPCOUNT, > + TEST_PAN, > + TEST_FLIP, > + TEST_SURFLIVE, > + TEST_WRAP, > + TEST_FIELD, > +}; > + > +static uint32_t vlv_offset; > + > +static volatile bool quit; > + > +static void sighandler(int x) > +{ > + quit =3D true; > +} > + > +static uint16_t read_reg_16(uint32_t reg) > +{ > + return *(volatile uint16_t *)((volatile char*)mmio + vlv_offset + reg); > +} > + > +static uint32_t read_reg(uint32_t reg) > +{ > + return *(volatile uint32_t *)((volatile char*)mmio + vlv_offset + reg); > +} > + > +static void write_reg_16(uint32_t reg, uint16_t val) > +{ > + *(volatile uint16_t *)((volatile char*)mmio + vlv_offset + reg) =3D val; > +} > + > +static void write_reg(uint32_t reg, uint32_t val) > +{ > + *(volatile uint32_t *)((volatile char*)mmio + vlv_offset + reg) =3D val; > +} > + > +static int pipe_to_plane(uint32_t devid, int pipe) > +{ > + if (!IS_GEN2(devid) && !IS_GEN3(devid)) > + return pipe; > + > + switch (pipe) { > + case 0: > + if ((read_reg(DSPACNTR) & DISPPLANE_SEL_PIPE_MASK) =3D=3D DISPPLANE_SE= L_PIPE_B) > + return 1; > + return 0; > + case 1: > + if ((read_reg(DSPACNTR) & DISPPLANE_SEL_PIPE_MASK) =3D=3D DISPPLANE_SE= L_PIPE_A) > + return 0; > + return 1; > + } > + > + assert(0); > + > + return 0; > +} > + > +static uint32_t dspoffset_reg(uint32_t devid, int pipe) > +{ > + bool use_tileoff; > + > + pipe =3D pipe_to_plane(devid, pipe); > + > + if (IS_GEN2(devid) || IS_GEN3(devid)) > + use_tileoff =3D false; > + if (IS_HASWELL(devid) || IS_BROADWELL(devid)) > + use_tileoff =3D true; > + else { > + switch (pipe) { > + case 0: > + use_tileoff =3D read_reg(DSPACNTR) & DISPLAY_PLANE_TILED; > + break; > + case 1: > + use_tileoff =3D read_reg(DSPBCNTR) & DISPLAY_PLANE_TILED; > + break; > + case 2: > + use_tileoff =3D read_reg(DSPCCNTR) & DISPLAY_PLANE_TILED; > + break; > + } > + } > + > + if (use_tileoff) { > + switch (pipe) { > + case 0: > + return DSPATILEOFF; > + case 1: > + return DSPBTILEOFF; > + case 2: > + return DSPCTILEOFF; > + } > + } else { > + switch (pipe) { > + case 0: > + return DSPABASE; > + case 1: > + return DSPBBASE; > + case 2: > + return DSPCBASE; > + } > + } > + > + assert(0); > + > + return 0; > +} > + > +static uint32_t dspsurf_reg(uint32_t devid, int pipe) > +{ > + pipe =3D pipe_to_plane(devid, pipe); > + > + if (IS_GEN2(devid) || IS_GEN3(devid)) { > + switch (pipe) { > + case 0: > + return DSPABASE; > + case 1: > + return DSPBBASE; > + case 2: > + return DSPCBASE; > + } > + } else { > + switch (pipe) { > + case 0: > + return DSPASURF; > + case 1: > + return DSPBSURF; > + case 2: > + return DSPCSURF; > + } > + } > + > + assert(0); > + > + return 0; > +} > + > +static uint32_t dsl_reg(int pipe) > +{ > + switch (pipe) { > + case 0: > + return PIPEA_DSL; > + case 1: > + return PIPEB_DSL; > + case 2: > + return PIPEC_DSL; > + } > + > + assert(0); > + > + return 0; > +} > + > +static void poll_pixel_pipestat(int pipe, int bit, uint32_t *min, uint32= _t *max, const int count) > +{ > + uint32_t pix, pix1, pix2, iir, iir1, iir2, iir_bit, iir_mask; > + int i =3D 0; > + > + switch (pipe) { > + case 0: > + pix =3D PIPEAFRAMEPIXEL; > + iir_bit =3D 1 << bit; > + iir =3D PIPEASTAT; > + break; > + case 1: > + pix =3D PIPEBFRAMEPIXEL; > + iir_bit =3D 1 << bit; > + iir =3D PIPEBSTAT; > + break; > + default: > + return; > + } > + > + iir_mask =3D read_reg(iir) & 0x7fff0000; > + > + write_reg(iir, iir_mask | iir_bit); > + > + while (!quit) { > + pix1 =3D read_reg(pix); > + iir1 =3D read_reg(iir); > + iir2 =3D read_reg(iir); > + pix2 =3D read_reg(pix); > + > + if (!(iir2 & iir_bit)) > + continue; > + > + if (iir1 & iir_bit) { > + write_reg(iir, iir_mask | iir_bit); > + continue; > + } > + > + pix1 &=3D PIPE_PIXEL_MASK; > + pix2 &=3D PIPE_PIXEL_MASK; > + > + min[i] =3D pix1; > + max[i] =3D pix2; > + if (++i >=3D count) > + break; > + } > +} > + > +static void poll_pixel_iir_gen3(int pipe, int bit, uint32_t *min, uint32= _t *max, const int count) > +{ > + uint32_t pix, pix1, pix2, iir1, iir2, imr_save, ier_save; > + int i =3D 0; > + > + bit =3D 1 << bit; > + > + switch (pipe) { > + case 0: > + pix =3D PIPEAFRAMEPIXEL; > + break; > + case 1: > + pix =3D PIPEBFRAMEPIXEL; > + break; > + default: > + return; > + } > + > + imr_save =3D read_reg(IMR); > + ier_save =3D read_reg(IER); > + > + write_reg(IER, ier_save & ~bit); > + write_reg(IMR, imr_save & ~bit); > + > + write_reg(IIR, bit); > + > + while (!quit) { > + pix1 =3D read_reg(pix); > + iir1 =3D read_reg(IIR); > + iir2 =3D read_reg(IIR); > + pix2 =3D read_reg(pix); > + > + if (!(iir2 & bit)) > + continue; > + > + write_reg(IIR, bit); > + > + if (iir1 & bit) > + continue; > + > + pix1 &=3D PIPE_PIXEL_MASK; > + pix2 &=3D PIPE_PIXEL_MASK; > + > + min[i] =3D pix1; > + max[i] =3D pix2; > + if (++i >=3D count) > + break; > + } > + > + write_reg(IMR, imr_save); > + write_reg(IER, ier_save); > +} > + > +static void poll_pixel_framecount_gen3(int pipe, uint32_t *min, uint32_t= *max, const int count) > +{ > + uint32_t pix, pix1, pix2, frm1, frm2; > + int i =3D 0; > + > + switch (pipe) { > + case 0: > + pix =3D PIPEAFRAMEPIXEL; > + break; > + case 1: > + pix =3D PIPEBFRAMEPIXEL; > + break; > + default: > + return; > + } > + > + while (!quit) { > + pix1 =3D read_reg(pix); > + pix2 =3D read_reg(pix); > + > + frm1 =3D pix1 >> 24; > + frm2 =3D pix2 >> 24; > + > + if (frm1 + 1 !=3D frm2) > + continue; > + > + pix1 &=3D PIPE_PIXEL_MASK; > + pix2 &=3D PIPE_PIXEL_MASK; > + > + min[i] =3D pix1; > + max[i] =3D pix2; > + if (++i >=3D count) > + break; > + } > +} > + > +static void poll_pixel_pan(uint32_t devid, int pipe, int target_pixel, i= nt target_fuzz, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t pix, pix1 =3D 0, pix2 =3D 0; > + uint32_t saved, surf =3D 0; > + int i =3D 0; > + > + switch (pipe) { > + case 0: > + pix =3D PIPEAFRAMEPIXEL; > + break; > + case 1: > + pix =3D PIPEBFRAMEPIXEL; > + break; > + default: > + return; > + } > + > + surf =3D dspoffset_reg(devid, pipe); > + > + saved =3D read_reg(surf); > + > + while (!quit) { > + while (!quit){ > + pix1 =3D read_reg(pix) & PIPE_PIXEL_MASK; > + if (pix1 =3D=3D target_pixel) > + break; > + } > + > + write_reg(surf, saved+256); > + > + while (!quit){ > + pix2 =3D read_reg(pix) & PIPE_PIXEL_MASK; > + if (pix2 >=3D target_pixel + target_fuzz) > + break; > + } > + > + write_reg(surf, saved); > + > + min[i] =3D pix1; > + max[i] =3D pix2; > + if (++i >=3D count) > + break; > + } > + > + write_reg(surf, saved); > +} > + > +static void poll_pixel_flip(uint32_t devid, int pipe, int target_pixel, = int target_fuzz, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t pix, pix1, pix2; > + uint32_t saved, surf =3D 0; > + int i =3D 0; > + > + switch (pipe) { > + case 0: > + pix =3D PIPEAFRAMEPIXEL; > + case 1: > + pix =3D PIPEBFRAMEPIXEL; > + default: > + return; > + } > + > + surf =3D dspsurf_reg(devid, pipe); > + > + saved =3D read_reg(surf); > + > + while (!quit) { > + while (!quit){ > + pix1 =3D read_reg(pix) & PIPE_PIXEL_MASK; > + if (pix1 =3D=3D target_pixel) > + break; > + } > + > + write_reg(surf, saved+4096); > + > + while (!quit){ > + pix2 =3D read_reg(pix) & PIPE_PIXEL_MASK; > + if (pix2 >=3D target_pixel + target_fuzz) > + break; > + } > + > + write_reg(surf, saved); > + > + min[i] =3D pix1; > + max[i] =3D pix2; > + if (++i >=3D count) > + break; > + } > + > + write_reg(surf, saved); > +} > + > +static void poll_pixel_wrap(int pipe, uint32_t *min, uint32_t *max, cons= t int count) > +{ > + uint32_t pix, pix1, pix2; > + int i =3D 0; > + > + switch (pipe) { > + case 0: > + pix =3D PIPEAFRAMEPIXEL; > + break; > + case 1: > + pix =3D PIPEBFRAMEPIXEL; > + break; > + default: > + return; > + } > + > + while (!quit) { > + pix1 =3D read_reg(pix); > + pix2 =3D read_reg(pix); > + > + pix1 &=3D PIPE_PIXEL_MASK; > + pix2 &=3D PIPE_PIXEL_MASK; > + > + if (pix2 >=3D pix1) > + continue; > + > + min[i] =3D pix1; > + max[i] =3D pix2; > + if (++i >=3D count) > + break; > + } > +} > + > +static void poll_dsl_pipestat(int pipe, int bit, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t dsl, dsl1, dsl2, iir, iir1, iir2, iir_bit, iir_mask; > + bool field1, field2; > + int i[2] =3D {}; > + > + switch (pipe) { > + case 0: > + iir_bit =3D 1 << bit; > + iir =3D PIPEASTAT; > + break; > + case 1: > + iir_bit =3D 1 << bit; > + iir =3D PIPEBSTAT; > + break; > + default: > + return; > + } > + > + dsl =3D dsl_reg(pipe); > + > + iir_mask =3D read_reg(iir) & 0x7fff0000; > + > + write_reg(iir, iir_mask | iir_bit); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + iir1 =3D read_reg(iir); > + iir2 =3D read_reg(iir); > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (!(iir2 & iir_bit)) > + continue; > + > + if (iir1 & iir_bit) { > + write_reg(iir, iir_mask | iir_bit); > + continue; > + } > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > +} > + > +static void poll_dsl_iir_gen2(int pipe, int bit, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t dsl, dsl1, dsl2, iir1, iir2, imr_save, ier_save; > + bool field1, field2; > + int i[2] =3D {}; > + > + bit =3D 1 << bit; > + > + dsl =3D dsl_reg(pipe); > + > + imr_save =3D read_reg_16(IMR); > + ier_save =3D read_reg_16(IER); > + > + write_reg_16(IER, ier_save & ~bit); > + write_reg_16(IMR, imr_save & ~bit); > + > + write_reg_16(IIR, bit); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + iir1 =3D read_reg_16(IIR); > + iir2 =3D read_reg_16(IIR); > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (!(iir2 & bit)) > + continue; > + > + write_reg_16(IIR, bit); > + > + if (iir1 & bit) > + continue; > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > + > + write_reg_16(IMR, imr_save); > + write_reg_16(IER, ier_save); > +} > + > +static void poll_dsl_iir_gen3(int pipe, int bit, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t dsl, dsl1, dsl2, iir1, iir2, imr_save, ier_save; > + bool field1, field2; > + int i[2] =3D {}; > + > + bit =3D 1 << bit; > + > + dsl =3D dsl_reg(pipe); > + > + imr_save =3D read_reg(IMR); > + ier_save =3D read_reg(IER); > + > + write_reg(IER, ier_save & ~bit); > + write_reg(IMR, imr_save & ~bit); > + > + write_reg(IIR, bit); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + iir1 =3D read_reg(IIR); > + iir2 =3D read_reg(IIR); > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (!(iir2 & bit)) > + continue; > + > + write_reg(IIR, bit); > + > + if (iir1 & bit) > + continue; > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > + > + write_reg(IMR, imr_save); > + write_reg(IER, ier_save); > +} > + > +static void poll_dsl_deiir(uint32_t devid, int pipe, int bit, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t dsl, dsl1, dsl2, iir1, iir2, imr_save, ier_save; > + bool field1, field2; > + uint32_t iir, ier, imr; > + int i[2] =3D {}; > + > + bit =3D 1 << bit; > + > + dsl =3D dsl_reg(pipe); > + > + if (IS_GEN8(devid)) { > + iir =3D GEN8_DE_PIPE_IIR(pipe); > + ier =3D GEN8_DE_PIPE_IER(pipe); > + imr =3D GEN8_DE_PIPE_IMR(pipe); > + } else { > + iir =3D DEIIR; > + ier =3D DEIER; > + imr =3D DEIMR; > + } > + > + imr_save =3D read_reg(imr); > + ier_save =3D read_reg(ier); > + > + write_reg(ier, ier_save & ~bit); > + write_reg(imr, imr_save & ~bit); > + > + write_reg(iir, bit); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + iir1 =3D read_reg(iir); > + iir2 =3D read_reg(iir); > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (!(iir2 & bit)) > + continue; > + > + write_reg(iir, bit); > + > + if (iir1 & bit) > + continue; > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > + > + write_reg(imr, imr_save); > + write_reg(ier, ier_save); > +} > + > +static void poll_dsl_framecount_g4x(int pipe, uint32_t *min, uint32_t *m= ax, const int count) > +{ > + uint32_t dsl, dsl1, dsl2, frm, frm1, frm2; > + bool field1, field2; > + int i[2] =3D {}; > + > + switch (pipe) { > + case 0: > + frm =3D PIPEAFRMCOUNT_G4X; > + break; > + case 1: > + frm =3D PIPEBFRMCOUNT_G4X; > + break; > + case 2: > + frm =3D PIPECFRMCOUNT_G4X; > + break; > + default: > + return; > + } > + > + dsl =3D dsl_reg(pipe); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + frm1 =3D read_reg(frm); > + frm2 =3D read_reg(frm); > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (frm1 + 1 !=3D frm2) > + continue; > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > +} > + > +static void poll_dsl_flipcount_g4x(uint32_t devid, int pipe, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t dsl, dsl1, dsl2, flp, flp1, flp2, surf; > + bool field1, field2; > + int i[2] =3D {}; > + > + switch (pipe) { > + case 0: > + flp =3D PIPEAFLIPCOUNT_G4X; > + break; > + case 1: > + flp =3D PIPEBFLIPCOUNT_G4X; > + break; > + case 2: > + flp =3D PIPECFLIPCOUNT_G4X; > + break; > + default: > + return; > + } > + > + dsl =3D dsl_reg(pipe); > + surf =3D dspsurf_reg(devid, pipe); > + > + while (!quit) { > + usleep(10); > + dsl1 =3D read_reg(dsl); > + flp1 =3D read_reg(flp); > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + return; > + > + write_reg(surf, read_reg(surf)); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + flp2 =3D read_reg(flp); > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (flp1 =3D=3D flp2) > + continue; > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > + if (i[field1] >=3D count) > + break; > + } > +} > + > +static void poll_dsl_framecount_gen3(int pipe, uint32_t *min, uint32_t *= max, const int count) > +{ > + uint32_t dsl, dsl1, dsl2, frm, frm1, frm2; > + bool field1, field2; > + int i[2] =3D {}; > + > + switch (pipe) { > + case 0: > + frm =3D PIPEAFRAMEPIXEL; > + break; > + case 1: > + frm =3D PIPEBFRAMEPIXEL; > + break; > + default: > + return; > + } > + > + dsl =3D dsl_reg(pipe); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + frm1 =3D read_reg(frm) >> 24; > + frm2 =3D read_reg(frm) >> 24; > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (frm1 + 1 !=3D frm2) > + continue; > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > +} > + > +static void poll_dsl_pan(uint32_t devid, int pipe, int target_scanline, = int target_fuzz, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t dsl, dsl1 =3D 0, dsl2 =3D 0; > + bool field1 =3D false, field2 =3D false; > + uint32_t saved, surf =3D 0; > + int i[2] =3D {}; > + > + dsl =3D dsl_reg(pipe); > + surf =3D dspoffset_reg(devid, pipe); > + > + saved =3D read_reg(surf); > + > + while (!quit) { > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + field1 =3D dsl1 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + if (dsl1 =3D=3D target_scanline) > + break; > + } > + > + write_reg(surf, saved+256); > + > + while (!quit) { > + dsl2 =3D read_reg(dsl); > + field2 =3D dsl1 & 0x80000000; > + dsl2 &=3D ~0x80000000; > + if (dsl2 =3D=3D target_scanline + target_fuzz) > + break; > + } > + > + write_reg(surf, saved); > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > + > + write_reg(surf, saved); > +} > + > +static void poll_dsl_flip(uint32_t devid, int pipe, int target_scanline,= int target_fuzz, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t dsl, dsl1 =3D 0, dsl2 =3D 0; > + bool field1 =3D false, field2 =3D false; > + uint32_t saved, surf =3D 0; > + int i[2] =3D {}; > + > + dsl =3D dsl_reg(pipe); > + surf =3D dspsurf_reg(devid, pipe); > + > + saved =3D read_reg(surf); > + > + while (!quit) { > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + field1 =3D dsl1 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + if (dsl1 =3D=3D target_scanline) > + break; > + } > + > + write_reg(surf, saved+4096); > + > + while (!quit) { > + dsl2 =3D read_reg(dsl); > + field2 =3D dsl1 & 0x80000000; > + dsl2 &=3D ~0x80000000; > + if (dsl2 =3D=3D target_scanline + target_fuzz) > + break; > + } > + > + write_reg(surf, saved); > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > + > + write_reg(surf, saved); > +} > + > +static void poll_dsl_surflive(uint32_t devid, int pipe, > + uint32_t *min, uint32_t *max, const int count) > +{ > + uint32_t dsl, dsl1 =3D 0, dsl2 =3D 0, surf, surf1, surf2, surflive, sur= fl1 =3D 0, surfl2, saved, tmp; > + bool field1 =3D false, field2 =3D false; > + int i[2] =3D {}; > + > + switch (pipe) { > + case 0: > + surflive =3D DSPASURFLIVE; > + break; > + case 1: > + surflive =3D DSPBSURFLIVE; > + break; > + case 2: > + surflive =3D DSPCSURFLIVE; > + break; > + default: > + return; > + } > + > + dsl =3D dsl_reg(pipe); > + surf =3D dspsurf_reg(devid, pipe); > + > + saved =3D read_reg(surf); > + > + surf1 =3D saved & ~0xfff; > + surf2 =3D surf1 + 4096; > + > + while (!quit) { > + write_reg(surf, surf2); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + surfl1 =3D read_reg(surflive) & ~0xfff; > + surfl2 =3D read_reg(surflive) & ~0xfff; > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (surfl2 =3D=3D surf2) > + break; > + } > + > + if (surfl1 !=3D surf2) { > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > + > + tmp =3D surf1; > + surf1 =3D surf2; > + surf2 =3D tmp; > + } > + > + write_reg(surf, saved); > +} > + > +static void poll_dsl_wrap(int pipe, uint32_t *min, uint32_t *max, const = int count) > +{ > + uint32_t dsl, dsl1, dsl2; > + bool field1, field2; > + int i[2] =3D {}; > + > + dsl =3D dsl_reg(pipe); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (dsl2 >=3D dsl1) > + continue; > + > + if (field1 !=3D field2) > + printf("fields are different (%u:%u -> %u:%u)\n", > + field1, dsl1, field2, dsl2); > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > +} > + > +static void poll_dsl_field(int pipe, uint32_t *min, uint32_t *max, const= int count) > +{ > + uint32_t dsl, dsl1, dsl2; > + bool field1, field2; > + int i[2] =3D {}; > + > + dsl =3D dsl_reg(pipe); > + > + while (!quit) { > + dsl1 =3D read_reg(dsl); > + dsl2 =3D read_reg(dsl); > + > + field1 =3D dsl1 & 0x80000000; > + field2 =3D dsl2 & 0x80000000; > + dsl1 &=3D ~0x80000000; > + dsl2 &=3D ~0x80000000; > + > + if (field1 =3D=3D field2) > + continue; > + > + min[field1*count+i[field1]] =3D dsl1; > + max[field1*count+i[field1]] =3D dsl2; > + if (++i[field1] >=3D count) > + break; > + } > +} > + > +static char pipe_name(int pipe) > +{ > + return pipe + 'A'; > +} > + > +static const char *test_name(enum test test, int pipe, int bit, bool tes= t_pixel_count) > +{ > + static char str[32]; > + const char *type =3D test_pixel_count ? "pixel" : "dsl"; > + > + switch (test) { > + case TEST_PIPESTAT: > + snprintf(str, sizeof str, "%s / pipe %c / PIPESTAT[%d] (gmch)", type, = pipe_name(pipe), bit); > + return str; > + case TEST_IIR_GEN2: > + snprintf(str, sizeof str, "%s / pipe %c / IIR[%d] (gen2)", type, pipe_= name(pipe), bit); > + return str; > + case TEST_IIR_GEN3: > + snprintf(str, sizeof str, "%s / pipe %c / IIR[%d] (gen3+)", type, pipe= _name(pipe), bit); > + return str; > + case TEST_DEIIR: > + snprintf(str, sizeof str, "%s / pipe %c / DEIIR[%d] (pch)", type, pipe= _name(pipe), bit); > + return str; > + case TEST_FRAMECOUNT_GEN3: > + snprintf(str, sizeof str, "%s / pipe %c / Frame count (gen3/4)", type,= pipe_name(pipe)); > + return str; > + case TEST_FRAMECOUNT_G4X: > + snprintf(str, sizeof str, "%s / pipe %c / Frame count (g4x+)", type, p= ipe_name(pipe)); > + return str; > + case TEST_FLIPCOUNT: > + snprintf(str, sizeof str, "%s / pipe %c / Flip count (g4x+)", type, pi= pe_name(pipe)); > + return str; > + case TEST_PAN: > + snprintf(str, sizeof str, "%s / pipe %c / Pan", type, pipe_name(pipe)); > + return str; > + case TEST_FLIP: > + snprintf(str, sizeof str, "%s / pipe %c / Flip", type, pipe_name(pipe)= ); > + return str; > + case TEST_SURFLIVE: > + snprintf(str, sizeof str, "%s / pipe %c / Surflive", type, pipe_name(p= ipe)); > + return str; > + case TEST_WRAP: > + snprintf(str, sizeof str, "%s / pipe %c / Wrap", type, pipe_name(pipe)= ); > + return str; > + case TEST_FIELD: > + snprintf(str, sizeof str, "%s / pipe %c / Field", type, pipe_name(pipe= )); > + return str; > + default: > + return ""; > + } > +} > + > +static void usage(const char *name) > +{ > + fprintf(stderr, "Usage: %s [options]\n" > + " -t,--test \n" > + " -p,--pipe \n" > + " -b,--bit \n" > + " -l,--line \n" > + " -f,--fuzz \n" > + " -x,--pixel\n", > + name); > + exit(1); > +} > + > +int main(int argc, char *argv[]) > +{ > + int fd, i; > + int pipe =3D 0, bit =3D 0, target_scanline =3D 0, target_fuzz =3D 1; > + bool test_pixelcount =3D false; > + uint32_t devid; > + uint32_t min[2*128] =3D {}; > + uint32_t max[2*128] =3D {}; > + uint32_t a, b; > + enum test test =3D TEST_INVALID; > + const int count =3D ARRAY_SIZE(min)/2; > + > + for (;;) { > + static const struct option long_options[] =3D { > + { .name =3D "test", .has_arg =3D required_argument, }, > + { .name =3D "pipe", .has_arg =3D required_argument, }, > + { .name =3D "bit", .has_arg =3D required_argument, }, > + { .name =3D "line", .has_arg =3D required_argument, }, > + { .name =3D "fuzz", .has_arg =3D required_argument, }, > + { .name =3D "pixel", .has_arg =3D no_argument, }, > + { }, > + }; > + > + int opt =3D getopt_long(argc, argv, "t:p:b:l:f:x", long_options, NULL); > + if (opt =3D=3D -1) > + break; > + > + switch (opt) { > + case 't': > + if (!strcmp(optarg, "pipestat")) > + test =3D TEST_PIPESTAT; > + else if (!strcmp(optarg, "iir")) > + test =3D TEST_IIR; > + else if (!strcmp(optarg, "framecount")) > + test =3D TEST_FRAMECOUNT; > + else if (!strcmp(optarg, "flipcount")) > + test =3D TEST_FLIPCOUNT; > + else if (!strcmp(optarg, "pan")) > + test =3D TEST_PAN; > + else if (!strcmp(optarg, "flip")) > + test =3D TEST_FLIP; > + else if (!strcmp(optarg, "surflive")) > + test =3D TEST_SURFLIVE; > + else if (!strcmp(optarg, "wrap")) > + test =3D TEST_WRAP; > + else if (!strcmp(optarg, "field")) > + test =3D TEST_FIELD; > + else > + usage(argv[0]); > + break; > + case 'p': > + pipe =3D atoi(optarg); > + if (pipe < 0 || pipe > 2) > + usage(argv[0]); > + break; > + case 'b': > + bit =3D atoi(optarg); > + if (bit < 0 || bit > 31) > + usage(argv[0]); > + break; > + case 'l': > + target_scanline =3D atoi(optarg); > + if (target_scanline < 0) > + usage(argv[0]); > + break; > + case 'f': > + target_fuzz =3D atoi(optarg); > + if (target_fuzz <=3D 0) > + usage(argv[0]); > + break; > + case 'x': > + test_pixelcount =3D true; > + break; > + } > + } > + > + fd =3D drm_open_any(); > + devid =3D intel_get_drm_devid(fd); > + close(fd); > + > + /* > + * check if the requires registers are > + * avilable on the current platform. > + */ > + if (IS_GEN2(devid)) { > + if (pipe > 1) > + usage(argv[0]); > + > + if (test_pixelcount) > + usage(argv[0]); > + > + switch (test) { > + case TEST_IIR: > + test =3D TEST_IIR_GEN2; > + break; > + case TEST_PIPESTAT: > + case TEST_PAN: > + break; > + case TEST_FLIP: > + test =3D TEST_PAN; > + break; > + default: > + usage(argv[0]); > + } > + } else if (IS_GEN3(devid) || > + (IS_GEN4(devid) && !IS_G4X(devid))) { > + if (pipe > 1) > + usage(argv[0]); > + > + switch (test) { > + case TEST_IIR: > + test =3D TEST_IIR_GEN3; > + break; > + case TEST_FRAMECOUNT: > + test =3D TEST_FRAMECOUNT_GEN3; > + break; > + case TEST_PIPESTAT: > + case TEST_PAN: > + case TEST_WRAP: > + case TEST_FIELD: > + break; > + case TEST_FLIP: > + if (IS_GEN3(devid)) > + test =3D TEST_PAN; > + break; > + default: > + usage(argv[0]); > + } > + } else if (IS_G4X(devid) || IS_VALLEYVIEW(devid)) { > + if (IS_VALLEYVIEW(devid)) > + vlv_offset =3D 0x180000; > + > + if (pipe > 1) > + usage(argv[0]); > + > + if (test_pixelcount) > + usage(argv[0]); > + > + switch (test) { > + case TEST_IIR: > + test =3D TEST_IIR_GEN3; > + break; > + case TEST_FRAMECOUNT: > + test =3D TEST_FRAMECOUNT_G4X; > + break; > + case TEST_FLIPCOUNT: > + case TEST_PIPESTAT: > + case TEST_PAN: > + case TEST_FLIP: > + case TEST_SURFLIVE: > + case TEST_WRAP: > + case TEST_FIELD: > + break; > + default: > + usage(argv[0]); > + } > + } else if (HAS_PCH_SPLIT(devid) && > + (IS_GEN5(devid) || IS_GEN6(devid) || IS_GEN7(devid))) { > + if (pipe > 1 && > + (IS_GEN5(devid) || IS_GEN6(devid))) > + usage(argv[0]); > + > + if (test_pixelcount) > + usage(argv[0]); > + > + switch (test) { > + case TEST_IIR: > + test =3D TEST_DEIIR; > + break; > + case TEST_FRAMECOUNT: > + test =3D TEST_FRAMECOUNT_G4X; > + break; > + case TEST_FLIPCOUNT: > + case TEST_PAN: > + case TEST_FLIP: > + case TEST_SURFLIVE: > + case TEST_WRAP: > + case TEST_FIELD: > + break; > + default: > + usage(argv[0]); > + } > + } else if (IS_GEN8(devid)) { > + if (test_pixelcount) > + usage(argv[0]); > + > + switch (test) { > + case TEST_IIR: > + test =3D TEST_DEIIR; > + break; > + case TEST_FRAMECOUNT: > + test =3D TEST_FRAMECOUNT_G4X; > + break; > + case TEST_FLIPCOUNT: > + case TEST_PAN: > + case TEST_FLIP: > + case TEST_SURFLIVE: > + case TEST_WRAP: > + case TEST_FIELD: > + break; > + default: > + usage(argv[0]); > + } > + } else { > + usage(argv[0]); > + } > + > + switch (test) { > + case TEST_IIR: > + case TEST_FRAMECOUNT: > + /* should no longer have the generic tests here */ > + assert(0); > + default: > + break; > + } > + > + intel_register_access_init(intel_get_pci_device(), 0); > + > + printf("%s?\n", test_name(test, pipe, bit, test_pixelcount)); > + > + signal(SIGHUP, sighandler); > + signal(SIGINT, sighandler); > + signal(SIGTERM, sighandler); > + > + switch (test) { > + case TEST_PIPESTAT: > + if (test_pixelcount) > + poll_pixel_pipestat(pipe, bit, min, max, count); > + else > + poll_dsl_pipestat(pipe, bit, min, max, count); > + break; > + case TEST_IIR_GEN2: > + assert(!test_pixelcount); > + poll_dsl_iir_gen2(pipe, bit, min, max, count); > + break; > + case TEST_IIR_GEN3: > + if (test_pixelcount) > + poll_pixel_iir_gen3(pipe, bit, min, max, count); > + else > + poll_dsl_iir_gen3(pipe, bit, min, max, count); > + break; > + case TEST_DEIIR: > + assert(!test_pixelcount); > + poll_dsl_deiir(devid, pipe, bit, min, max, count); > + break; > + case TEST_FRAMECOUNT_GEN3: > + if (test_pixelcount) > + poll_pixel_framecount_gen3(pipe, min, max, count); > + else > + poll_dsl_framecount_gen3(pipe, min, max, count); > + break; > + case TEST_FRAMECOUNT_G4X: > + assert(!test_pixelcount); > + poll_dsl_framecount_g4x(pipe, min, max, count); > + break; > + case TEST_FLIPCOUNT: > + assert(!test_pixelcount); > + poll_dsl_flipcount_g4x(devid, pipe, min, max, count); > + break; > + case TEST_PAN: > + if (test_pixelcount) > + poll_pixel_pan(devid, pipe, target_scanline, target_fuzz, > + min, max, count); > + else > + poll_dsl_pan(devid, pipe, target_scanline, target_fuzz, > + min, max, count); > + break; > + case TEST_FLIP: > + if (test_pixelcount) > + poll_pixel_flip(devid, pipe, target_scanline, target_fuzz, > + min, max, count); > + else > + poll_dsl_flip(devid, pipe, target_scanline, target_fuzz, > + min, max, count); > + break; > + case TEST_SURFLIVE: > + poll_dsl_surflive(devid, pipe, min, max, count); > + break; > + case TEST_WRAP: > + if (test_pixelcount) > + poll_pixel_wrap(pipe, min, max, count); > + else > + poll_dsl_wrap(pipe, min, max, count); > + break; > + case TEST_FIELD: > + poll_dsl_field(pipe, min, max, count); > + break; > + default: > + assert(0); > + } > + > + intel_register_access_fini(); > + > + if (quit) > + return 0; > + > + for (i =3D 0; i < count; i++) { > + if (min[0*count+i] =3D=3D 0 && max[0*count+i] =3D=3D 0) > + break; > + printf("[%u] %4u - %4u (%4u)\n", 0, min[0*count+i], max[0*count+i], > + (min[0*count+i] + max[0*count+i] + 1) >> 1); > + } > + for (i =3D 0; i < count; i++) { > + if (min[1*count+i] =3D=3D 0 && max[1*count+i] =3D=3D 0) > + break; > + printf("[%u] %4u - %4u (%4u)\n", 1, min[1*count+i], max[1*count+i], > + (min[1*count+i] + max[1*count+i] + 1) >> 1); > + } > + > + a =3D 0; > + b =3D 0xffffffff; > + for (i =3D 0; i < count; i++) { > + if (min[0*count+i] =3D=3D 0 && max[0*count+i] =3D=3D 0) > + break; > + a =3D max(a, min[0*count+i]); > + b =3D min(b, max[0*count+i]); > + } > + > + printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, bit, test_pixelcou= nt), 0, a, b); > + > + a =3D 0; > + b =3D 0xffffffff; > + for (i =3D 0; i < count; i++) { > + if (min[1*count+i] =3D=3D 0 && max[1*count+i] =3D=3D 0) > + break; > + a =3D max(a, min[1*count+i]); > + b =3D min(b, max[1*count+i]); > + } > + > + printf("%s: [%u] %6u - %6u\n", test_name(test, pipe, bit, test_pixelcou= nt), 1, a, b); > + > + return 0; > +} > -- = > 1.8.5.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch