From: Mukesh Rathor <mukesh.rathor@oracle.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: kevin.tian@intel.com, suravee.suthikulpanit@amd.com,
eddie.dong@intel.com, Jan Beulich <JBeulich@suse.com>,
Aravind.Gopalakrishnan@amd.com, jun.nakajima@intel.com,
xen-devel <xen-devel@lists.xenproject.org>,
"boris.ostrovsky@oracle.com" <boris.ostrovsky@oracle.com>
Subject: Re: [RFH]: AMD SVM #PF error code with P and RSVD bit....
Date: Tue, 17 Jun 2014 14:43:25 -0700 [thread overview]
Message-ID: <20140617144325.2005ba30@mantra.us.oracle.com> (raw)
In-Reply-To: <53A0437C.6040403@citrix.com>
On Tue, 17 Jun 2014 14:32:44 +0100
Andrew Cooper <andrew.cooper3@citrix.com> wrote:
> On 17/06/14 08:01, Jan Beulich wrote:
> >>>> On 17.06.14 at 00:44, <mukesh.rathor@oracle.com> wrote:
> >> On Mon, 16 Jun 2014 10:24:15 +0100
> >> "Jan Beulich" <JBeulich@suse.com> wrote:
> >>
> >>>>>> On 14.06.14 at 03:03, <mukesh.rathor@oracle.com> wrote:
> >>>> I am trying to debug this triple fault bringing up PVH linux
> >>>> domU on AMD.
> >>>>
> >>>> Instruction:
> >>>> ffffffff81d2d976: 8:dmi_scan_machine+b7 mov (%r12),
> >>>> %rax r12: ffffffffff46e000
> >>>>
> >>>> This first causes #PF:
> >>>> (XEN) exitcode = 0x4e exitintinfo = 0
> >>>> (XEN) exitinfo1 = 0x9 exitinfo2 = 0xffffffffff46e000
> >>>>
> >>>> erro_code == 0x9 => RSVD bit set. according to the APM:
> >>>>
> >>>> RSV—Bit 3. If this bit is set to 1, the page fault is a result
> >>>> of the processor reading a 1 from a reserved field within a
> >>>> page-translation-table entry. This type of page fault occurs
> >>>> only when CR4.PSE=1 or CR4.PAE=1.
> >>>>
> >>>> My CR4 == 0x0000000000000060 == PAE MCE (Full vmcb below).
> >>>> However, all PTEs seem OK, all NPT entries seem OK too.
> >>>>
> >>>> PTE entries (l4 thru L1):
> >>>>
> >>>> 0000000001c16067 0000000001c18067 0000000001e8d067
> >>>> 80000000000f0463
> >>> EFER.NX is clear, and hence the NX bit on the L1 entry is wrong.
> >> Ah, interesting, I didn't realize it would complain about NX
> >> during load/store.
> >>
> >> BTW on:
> >>
> >> Intel:
> >> Guest EFER = 0x0000000000000000
> >>
> >> Ptes:
> >> 0000000001c16067 0000000001c18067 0000000001e8d067
> >> 80000000000f0463
> >>
> >> L1 has XD set. Maybe Intel just ignores the bit if EFER.NX is 0!
> > Which would be a bug imo.
>
> Intel Manual vol 3, 4.4.2 (32bit PAE) and 4.5 (64bit) states that
> EFER.NXE = 0 and L1.P = 1 causes the L1.NX to be reserved, and must
> be 0.
>
> I would expect this to fail with with a #PF indicating RSVD on Intel
> as well as AMD.
>
> I wonder whether there are some interaction issues with the non-root
> paging mode?
Hmm.. can't think of any, appears to be a processor issue.
[Adding Intel folks]
Hi Intel folks,
Can you please confirm if this is processor issue, and if yes, is
there need to open bug, and if yes, how?
thanks
Mukesh
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
prev parent reply other threads:[~2014-06-17 21:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-14 1:03 [RFH]: AMD SVM #PF error code with P and RSVD bit Mukesh Rathor
2014-06-16 9:24 ` Jan Beulich
2014-06-16 22:44 ` Mukesh Rathor
2014-06-17 7:01 ` Jan Beulich
2014-06-17 13:32 ` Andrew Cooper
2014-06-17 21:43 ` Mukesh Rathor [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20140617144325.2005ba30@mantra.us.oracle.com \
--to=mukesh.rathor@oracle.com \
--cc=Aravind.Gopalakrishnan@amd.com \
--cc=JBeulich@suse.com \
--cc=andrew.cooper3@citrix.com \
--cc=boris.ostrovsky@oracle.com \
--cc=eddie.dong@intel.com \
--cc=jun.nakajima@intel.com \
--cc=kevin.tian@intel.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=xen-devel@lists.xenproject.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.