From: Don Zickus <dzickus@redhat.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: "HATAYAMA, Daisuke" <d.hatayama@jp.fujitsu.com>,
hpa@zytor.com, matt@console-pimps.org, peterz@infradead.org,
acme@kernel.org, mingo@redhat.com, paulus@samba.org,
tglx@linutronix.de, x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] perf/x86/intel: ignore CondChgd bit to avoid false NMI handling
Date: Tue, 1 Jul 2014 10:22:01 -0400 [thread overview]
Message-ID: <20140701142201.GU7959@redhat.com> (raw)
In-Reply-To: <20140630222224.GH19781@tassilo.jf.intel.com>
On Mon, Jun 30, 2014 at 03:22:24PM -0700, Andi Kleen wrote:
> >
> > I'm also interested in the behaviour of CondChgd bit on Ivy Bridge processors.
>
> The intended meaning of CondChgd is that a hardware debugger has taken over the
> PMU. It shouldn't really be set in other circumstances.
Interesting. My concern is we have customers that can soft reboot a
machine and have this bit accidentally be enabled. I am pretty sure they
do not have a hardware debugger attached (I would have to double check).
Is there other ways this can be set?
Cheers,
Don
>
> I think right now for perf it would be best to just ignore it.
>
> In theory could stop using the PMU, but if some BIOS set it it would
> completely disable perf there. So better to just ignore it.
>
> -Andi
>
> --
> ak@linux.intel.com -- Speaking for myself only
next prev parent reply other threads:[~2014-07-01 14:22 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-13 8:44 [PATCH v2] perf/x86/intel: ignore CondChgd bit to avoid false NMI handling HATAYAMA Daisuke
2014-06-16 15:30 ` Don Zickus
2014-06-30 9:24 ` HATAYAMA, Daisuke
2014-06-30 22:22 ` Andi Kleen
2014-07-01 8:14 ` Peter Zijlstra
2014-07-01 14:22 ` Don Zickus [this message]
2014-07-02 1:07 ` HATAYAMA Daisuke
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