All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <20140702111435.GD14665@leverpostej>

diff --git a/a/1.txt b/N1/1.txt
index 3b8feea..531dcb1 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -9,20 +9,20 @@ now, and might not match the bindings that are eventually decided upon,
 which will result in annoying churn and possible breakage.
 
 On Wed, Jul 02, 2014 at 10:02:48AM +0100, Jingchang Lu wrote:
-> From: Jingchang Lu <b35083@freescale.com>
+> From: Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
 >
 > Add Freescale LS1021A SoC device tree support
 >
-> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
-> Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
-> Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
-> Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
-> Signed-off-by: Adrian Sendroiu <adrian.sendroiu@freescale.com>
-> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
-> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
-> Signed-off-by: Chao Fu <b44548@freescale.com>
-> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
-> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
+> Signed-off-by: Nikhil Badola <nikhil.badola-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+> Signed-off-by: Chenhui Zhao <chenhui.zhao-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+> Signed-off-by: Suresh Gupta <suresh.gupta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+> Signed-off-by: Shaveta Leekha <shaveta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+> Signed-off-by: Adrian Sendroiu <adrian.sendroiu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+> Signed-off-by: Ruchika Gupta <ruchika.gupta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+> Signed-off-by: Bhupesh Sharma <bhupesh.sharma-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+> Signed-off-by: Chao Fu <b44548-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+> Signed-off-by: Xiubo Li <Li.Xiubo-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+> Signed-off-by: Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
 > ---
 >  arch/arm/boot/dts/ls1021a.dtsi | 852 +++++++++++++++++++++++++++++++++++++++++
 >  1 file changed, 852 insertions(+)
@@ -42,25 +42,25 @@ On Wed, Jul 02, 2014 at 10:02:48AM +0100, Jingchang Lu wrote:
 
 Missing device_type = "memory";
 
-For unit-address and reg consistency, this should be memory at 0,80000000.
+For unit-address and reg consistency, this should be memory@0,80000000.
 
 > +
 > +       cpus {
 > +               #address-cells = <1>;
 > +               #size-cells = <0>;
 > +
-> +               cpu at 0 {
+> +               cpu@0 {
 > +                       compatible = "arm,cortex-a7";
 > +                       device_type = "cpu";
 > +                       reg = <0xf00>;
 > +               };
 
-That reg doesn't match the unit-address, which should be cpu at f00.
+That reg doesn't match the unit-address, which should be cpu@f00.
 
 Why is MPIDR.Aff1 == 0xf?
 
 > +
-> +               cpu at 1 {
+> +               cpu@1 {
 > +                       compatible = "arm,cortex-a7";
 > +                       device_type = "cpu";
 > +                       reg = <0xf01>;
@@ -83,7 +83,7 @@ Please do that for other nodes too.
 > +               interrupt-parent = <&gic>;
 > +               ranges;
 > +
-> +               gic: interrupt-controller at 1400000 {
+> +               gic: interrupt-controller@1400000 {
 > +                       compatible = "arm,cortex-a15-gic";
 > +                       #interrupt-cells = <3>;
 > +                       interrupt-controller;
@@ -95,7 +95,7 @@ Please do that for other nodes too.
 > +
 > +               };
 > +
-> +               tzasc: tzasc at 1500000 {
+> +               tzasc: tzasc@1500000 {
 > +                       reg = <0x0 0x1500000 0x0 0x10000>;
 > +                       interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 > +                       status = "disabled";
@@ -108,7 +108,7 @@ property being "disabled".
 Why is this here?
 
 > +
-> +               ifc: ifc at 1530000 {
+> +               ifc: ifc@1530000 {
 > +                       compatible = "fsl,ls1021a-ifc", "fsl,ifc", "simple-bus";
 
 This doesn't seem to have any children, ranges, #address-cells, or
@@ -122,7 +122,7 @@ binding are a bug).
 > +                       interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 > +               };
 > +
-> +               dcfg: dcfg at 1ee0000 {
+> +               dcfg: dcfg@1ee0000 {
 > +                       compatible = "fsl,ls1021a-dcfg";
 > +                       reg = <0x0 0x1ee0000 0x0 0x10000>;
 > +               };
@@ -131,7 +131,7 @@ Undocumented/unsupported binding.
 
 What is this?
 
-> +               qspi: quadspi at 1550000 {
+> +               qspi: quadspi@1550000 {
 > +                       #address-cells = <1>;
 > +                       #size-cells = <0>;
 > +                       compatible = "fsl,vf610-qspi";
@@ -162,7 +162,7 @@ why is it here?
 
 [...]
 
-> +               scfg: scfg at 1570000 {
+> +               scfg: scfg@1570000 {
 > +                       compatible = "fsl,ls1021a-scfg";
 > +                       reg = <0x0 0x1570000 0x0 0x10000>;
 > +               };
@@ -173,7 +173,7 @@ What is this?
 
 [...]
 
-> +               rcpm: rcpm at 1ee2000 {
+> +               rcpm: rcpm@1ee2000 {
 > +                       compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1";
 > +                       reg = <0x0 0x1ee2000 0x0 0x10000>;
 > +               };
@@ -184,7 +184,7 @@ What is this?
 
 [...]
 
-> +               gpio1: gpio at 2300000 {
+> +               gpio1: gpio@2300000 {
 > +                       compatible = "fsl,ls1021a-gpio";
 > +                       reg = <0x0 0x2300000 0x0 0x10000>;
 > +                       interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
@@ -198,7 +198,7 @@ Undocumented/unsupported binding.
 
 [...]
 
-> +               lpuart1: serial at 2960000 {
+> +               lpuart1: serial@2960000 {
 > +                       compatible = "fsl,ls1021a-lpuart";
 > +                       reg = <0x0 0x2960000 0x0 0x1000>;
 > +                       interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
@@ -211,7 +211,7 @@ Undocumented/unsupported binding.
 
 [...]
 
-> +               ftm2: ftm at 29f0000 {
+> +               ftm2: ftm@29f0000 {
 > +                       reg = <0x0 0x29f0000 0x0 0x10000>;
 > +                       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 > +                       status = "disabled";
@@ -221,7 +221,7 @@ Missing compatible strings.
 
 [...]
 
-> +               ftm5: ftm at 2a20000 {
+> +               ftm5: ftm@2a20000 {
 > +                       reg = <0x0 0x2a20000 0x0 0x10000>;
 > +                       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 > +                       status = "disabled";
@@ -231,7 +231,7 @@ Missing compatible strings.
 
 [...]
 
-> +               wdog0: wdog at 2ad0000 {
+> +               wdog0: wdog@2ad0000 {
 > +                       compatible = "fsl,ls1021a-wdt", "fsl,imx21-wdt";
 > +                       reg = <0x0 0x2ad0000 0x0 0x10000>;
 > +                       interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
@@ -247,7 +247,7 @@ What is going on here?
 
 [...]
 
-> +               can0: can at 2a70000 {
+> +               can0: can@2a70000 {
 > +                       compatible = "fsl,ls1021a-flexcan";
 > +                       reg = <0x0 0x2a70000 0x0 0x1000>;
 > +                       interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
@@ -261,7 +261,7 @@ Undocumented/unsupported binding.
 Was this mean to have an existing compatible string in the list?
 
 > +
-> +               can1: can at 2a80000 {
+> +               can1: can@2a80000 {
 > +                       compatible = "fsl,ls1021a-flexcan";
 > +                       reg = <0x0 0x2a80000 0x0 0x1000>;
 > +                       interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
@@ -270,7 +270,7 @@ Was this mean to have an existing compatible string in the list?
 > +                       status = "disabled";
 > +               };
 > +
-> +               can2: can at 2a90000 {
+> +               can2: can@2a90000 {
 > +                       compatible = "fsl,ls1021a-flexcan";
 > +                       reg = <0x0 0x2a90000 0x0 0x1000>;
 > +                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
@@ -279,7 +279,7 @@ Was this mean to have an existing compatible string in the list?
 > +                       status = "disabled";
 > +               };
 > +
-> +               can3: can at 2aa0000 {
+> +               can3: can@2aa0000 {
 > +                       compatible = "fsl,ls1021a-flexcan";
 > +                       reg = <0x0 0x2aa0000 0x0 0x1000>;
 > +                       interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
@@ -289,7 +289,7 @@ Was this mean to have an existing compatible string in the list?
 > +               };
 > +       };
 > +
-> +       dcsr at 20000000 {
+> +       dcsr@20000000 {
 > +               #address-cells = <1>;
 > +               #size-cells = <1>;
 > +               compatible = "fsl,ls1021a-dcsr", "simple-bus";
@@ -305,107 +305,107 @@ Mark.
 > +
 > +               ranges = <0x0 0x0 0x20000000 0x1000000>;
 > +
-> +               dcsr-epu at 0 {
+> +               dcsr-epu@0 {
 > +                       compatible = "fsl,ls1021a-dcsr-epu";
 > +                       reg = <0x0 0x10000>;
 > +               };
 > +
-> +               dcsr-gdi at 100000 {
+> +               dcsr-gdi@100000 {
 > +                       compatible = "fsl,ls1021a-dcsr-gdi";
 > +                       reg = <0x100000 0x10000>;
 > +               };
 > +
-> +               dcsr-dddi at 120000 {
+> +               dcsr-dddi@120000 {
 > +                       compatible = "fsl,ls1021a-dcsr-dddi";
 > +                       reg = <0x120000 0x10000>;
 > +               };
 > +
-> +               dcsr-dcfg at 220000 {
+> +               dcsr-dcfg@220000 {
 > +                       compatible = "fsl,ls1021a-dcsr-dcfg";
 > +                       reg = <0x220000 0x1000>;
 > +               };
 > +
-> +               dcsr-clock at 221000 {
+> +               dcsr-clock@221000 {
 > +                       compatible = "fsl,ls1021a-dcsr-clock";
 > +                       reg = <0x221000 0x1000>;
 > +               };
 > +
-> +               dcsr-rcpm at 222000 {
+> +               dcsr-rcpm@222000 {
 > +                       compatible = "fsl,ls1021a-dcsr-rcpm";
 > +                       reg = <0x222000 0x1000 0x223000 0x1000>;
 > +               };
 > +
-> +               dcsr-ccp at 225000 {
+> +               dcsr-ccp@225000 {
 > +                       compatible = "fsl,ls1021a-dcsr-ccp";
 > +                       reg = <0x225000 0x1000>;
 > +               };
 > +
-> +               dcsr-fusectrl at 226000 {
+> +               dcsr-fusectrl@226000 {
 > +                       compatible = "fsl,ls1021a-dcsr-fusectrl";
 > +                       reg = <0x226000 0x1000>;
 > +               };
 > +
-> +               dcsr-dap at 300000 {
+> +               dcsr-dap@300000 {
 > +                       compatible = "fsl,ls1021a-dcsr-dap";
 > +                       reg = <0x300000 0x10000>;
 > +               };
 > +
-> +               dcsr-cstf at 350000 {
+> +               dcsr-cstf@350000 {
 > +                       compatible = "fsl,ls1021a-dcsr-cstf";
 > +                       reg = <0x350000 0x1000 0x3a7000 0x1000>;
 > +               };
 > +
-> +               dcsr-a7rom at 360000 {
+> +               dcsr-a7rom@360000 {
 > +                       compatible = "fsl,ls1021a-dcsr-a7rom";
 > +                       reg = <0x360000 0x10000>;
 > +               };
 > +
-> +               dcsr-a7cpu at 370000 {
+> +               dcsr-a7cpu@370000 {
 > +                       compatible = "fsl,ls1021a-dcsr-a7cpu";
 > +                       reg = <0x370000 0x8000>;
 > +               };
 > +
-> +               dcsr-a7cti at 378000 {
+> +               dcsr-a7cti@378000 {
 > +                       compatible = "fsl,ls1021a-dcsr-a7cti";
 > +                       reg = <0x378000 0x4000>;
 > +               };
 > +
-> +               dcsr-etm at 37c000 {
+> +               dcsr-etm@37c000 {
 > +                       compatible = "fsl,ls1021a-dcsr-etm";
 > +                       reg = <0x37c000 0x1000 0x37d000 0x3000>;
 > +               };
 > +
-> +               dcsr-hugorom at 3a0000 {
+> +               dcsr-hugorom@3a0000 {
 > +                       compatible = "fsl,ls1021a-dcsr-hugorom";
 > +                       reg = <0x3a0000 0x1000>;
 > +               };
 > +
-> +               dcsr-etf at 3a1000 {
+> +               dcsr-etf@3a1000 {
 > +                       compatible = "fsl,ls1021a-dcsr-etf";
 > +                       reg = <0x3a1000 0x1000 0x3a2000 0x1000>;
 > +               };
 > +
-> +               dcsr-etr at 3a3000 {
+> +               dcsr-etr@3a3000 {
 > +                       compatible = "fsl,ls1021a-dcsr-etr";
 > +                       reg = <0x3a3000 0x1000>;
 > +               };
 > +
-> +               dcsr-cti at 3a4000 {
+> +               dcsr-cti@3a4000 {
 > +                       compatible = "fsl,ls1021a-dcsr-cti";
 > +                       reg = <0x3a4000 0x1000 0x3a5000 0x1000 0x3a6000 0x1000>;
 > +               };
 > +
-> +               dcsr-atbrepl at 3a8000 {
+> +               dcsr-atbrepl@3a8000 {
 > +                       compatible = "fsl,ls1021a-dcsr-atbrepl";
 > +                       reg = <0x3a8000 0x1000>;
 > +               };
 > +
-> +               dcsr-tsgen-ctrl at 3a9000 {
+> +               dcsr-tsgen-ctrl@3a9000 {
 > +                       compatible = "fsl,ls1021a-dcsr-tsgen-ctrl";
 > +                       reg = <0x3a9000 0x1000>;
 > +               };
 > +
-> +               dcsr-tsgen-read at 3aa000 {
+> +               dcsr-tsgen-read@3aa000 {
 > +                       compatible = "fsl,ls1021a-dcsr-tsgen-read";
 > +                       reg = <0x3aa000 0x1000>;
 > +               };
@@ -416,6 +416,10 @@ Mark.
 >
 > --
 > To unsubscribe from this list: send the line "unsubscribe devicetree" in
-> the body of a message to majordomo at vger.kernel.org
+> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
 > More majordomo info at  http://vger.kernel.org/majordomo-info.html
 >
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 0d1259e..b16b90d 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,9 +1,23 @@
  "ref\01404291772-2644-1-git-send-email-jingchang.lu@freescale.com\0"
  "ref\01404291772-2644-2-git-send-email-jingchang.lu@freescale.com\0"
- "From\0mark.rutland@arm.com (Mark Rutland)\0"
- "Subject\0[PATCH 1/5] ARM: dts: Add SoC level device tree support for LS1021A\0"
+ "ref\01404291772-2644-2-git-send-email-jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org\0"
+ "From\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\0"
+ "Subject\0Re: [PATCH 1/5] ARM: dts: Add SoC level device tree support for LS1021A\0"
  "Date\0Wed, 2 Jul 2014 12:14:35 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\0"
+ "Cc\0shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>"
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
+  Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+  Nikhil Badola <nikhil.badola-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+  Chenhui Zhao <chenhui.zhao-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+  Suresh Gupta <suresh.gupta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+  Shaveta Leekha <shaveta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+  Adrian Sendroiu <adrian.sendroiu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+  Ruchika Gupta <ruchika.gupta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+  Bhupesh Sharma <bhupesh.sharma-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+  Chao Fu <b44548-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
+ " Xiubo Li <Li.Xiubo-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\0"
  "\00:1\0"
  "b\0"
  "Hi,\n"
@@ -17,20 +31,20 @@
  "which will result in annoying churn and possible breakage.\n"
  "\n"
  "On Wed, Jul 02, 2014 at 10:02:48AM +0100, Jingchang Lu wrote:\n"
- "> From: Jingchang Lu <b35083@freescale.com>\n"
+ "> From: Jingchang Lu <b35083-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
  ">\n"
  "> Add Freescale LS1021A SoC device tree support\n"
  ">\n"
- "> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>\n"
- "> Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>\n"
- "> Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>\n"
- "> Signed-off-by: Shaveta Leekha <shaveta@freescale.com>\n"
- "> Signed-off-by: Adrian Sendroiu <adrian.sendroiu@freescale.com>\n"
- "> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>\n"
- "> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>\n"
- "> Signed-off-by: Chao Fu <b44548@freescale.com>\n"
- "> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>\n"
- "> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>\n"
+ "> Signed-off-by: Nikhil Badola <nikhil.badola-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
+ "> Signed-off-by: Chenhui Zhao <chenhui.zhao-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
+ "> Signed-off-by: Suresh Gupta <suresh.gupta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
+ "> Signed-off-by: Shaveta Leekha <shaveta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
+ "> Signed-off-by: Adrian Sendroiu <adrian.sendroiu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
+ "> Signed-off-by: Ruchika Gupta <ruchika.gupta-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
+ "> Signed-off-by: Bhupesh Sharma <bhupesh.sharma-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
+ "> Signed-off-by: Chao Fu <b44548-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
+ "> Signed-off-by: Xiubo Li <Li.Xiubo-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
+ "> Signed-off-by: Jingchang Lu <jingchang.lu-KZfg59tc24xl57MIdRCFDg@public.gmane.org>\n"
  "> ---\n"
  ">  arch/arm/boot/dts/ls1021a.dtsi | 852 +++++++++++++++++++++++++++++++++++++++++\n"
  ">  1 file changed, 852 insertions(+)\n"
@@ -50,25 +64,25 @@
  "\n"
  "Missing device_type = \"memory\";\n"
  "\n"
- "For unit-address and reg consistency, this should be memory at 0,80000000.\n"
+ "For unit-address and reg consistency, this should be memory@0,80000000.\n"
  "\n"
  "> +\n"
  "> +       cpus {\n"
  "> +               #address-cells = <1>;\n"
  "> +               #size-cells = <0>;\n"
  "> +\n"
- "> +               cpu at 0 {\n"
+ "> +               cpu@0 {\n"
  "> +                       compatible = \"arm,cortex-a7\";\n"
  "> +                       device_type = \"cpu\";\n"
  "> +                       reg = <0xf00>;\n"
  "> +               };\n"
  "\n"
- "That reg doesn't match the unit-address, which should be cpu at f00.\n"
+ "That reg doesn't match the unit-address, which should be cpu@f00.\n"
  "\n"
  "Why is MPIDR.Aff1 == 0xf?\n"
  "\n"
  "> +\n"
- "> +               cpu at 1 {\n"
+ "> +               cpu@1 {\n"
  "> +                       compatible = \"arm,cortex-a7\";\n"
  "> +                       device_type = \"cpu\";\n"
  "> +                       reg = <0xf01>;\n"
@@ -91,7 +105,7 @@
  "> +               interrupt-parent = <&gic>;\n"
  "> +               ranges;\n"
  "> +\n"
- "> +               gic: interrupt-controller at 1400000 {\n"
+ "> +               gic: interrupt-controller@1400000 {\n"
  "> +                       compatible = \"arm,cortex-a15-gic\";\n"
  "> +                       #interrupt-cells = <3>;\n"
  "> +                       interrupt-controller;\n"
@@ -103,7 +117,7 @@
  "> +\n"
  "> +               };\n"
  "> +\n"
- "> +               tzasc: tzasc at 1500000 {\n"
+ "> +               tzasc: tzasc@1500000 {\n"
  "> +                       reg = <0x0 0x1500000 0x0 0x10000>;\n"
  "> +                       interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +                       status = \"disabled\";\n"
@@ -116,7 +130,7 @@
  "Why is this here?\n"
  "\n"
  "> +\n"
- "> +               ifc: ifc at 1530000 {\n"
+ "> +               ifc: ifc@1530000 {\n"
  "> +                       compatible = \"fsl,ls1021a-ifc\", \"fsl,ifc\", \"simple-bus\";\n"
  "\n"
  "This doesn't seem to have any children, ranges, #address-cells, or\n"
@@ -130,7 +144,7 @@
  "> +                       interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcfg: dcfg at 1ee0000 {\n"
+ "> +               dcfg: dcfg@1ee0000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcfg\";\n"
  "> +                       reg = <0x0 0x1ee0000 0x0 0x10000>;\n"
  "> +               };\n"
@@ -139,7 +153,7 @@
  "\n"
  "What is this?\n"
  "\n"
- "> +               qspi: quadspi at 1550000 {\n"
+ "> +               qspi: quadspi@1550000 {\n"
  "> +                       #address-cells = <1>;\n"
  "> +                       #size-cells = <0>;\n"
  "> +                       compatible = \"fsl,vf610-qspi\";\n"
@@ -170,7 +184,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +               scfg: scfg at 1570000 {\n"
+ "> +               scfg: scfg@1570000 {\n"
  "> +                       compatible = \"fsl,ls1021a-scfg\";\n"
  "> +                       reg = <0x0 0x1570000 0x0 0x10000>;\n"
  "> +               };\n"
@@ -181,7 +195,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +               rcpm: rcpm at 1ee2000 {\n"
+ "> +               rcpm: rcpm@1ee2000 {\n"
  "> +                       compatible = \"fsl,ls1021a-rcpm\", \"fsl,qoriq-rcpm-2.1\";\n"
  "> +                       reg = <0x0 0x1ee2000 0x0 0x10000>;\n"
  "> +               };\n"
@@ -192,7 +206,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +               gpio1: gpio at 2300000 {\n"
+ "> +               gpio1: gpio@2300000 {\n"
  "> +                       compatible = \"fsl,ls1021a-gpio\";\n"
  "> +                       reg = <0x0 0x2300000 0x0 0x10000>;\n"
  "> +                       interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -206,7 +220,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +               lpuart1: serial at 2960000 {\n"
+ "> +               lpuart1: serial@2960000 {\n"
  "> +                       compatible = \"fsl,ls1021a-lpuart\";\n"
  "> +                       reg = <0x0 0x2960000 0x0 0x1000>;\n"
  "> +                       interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -219,7 +233,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +               ftm2: ftm at 29f0000 {\n"
+ "> +               ftm2: ftm@29f0000 {\n"
  "> +                       reg = <0x0 0x29f0000 0x0 0x10000>;\n"
  "> +                       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +                       status = \"disabled\";\n"
@@ -229,7 +243,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +               ftm5: ftm at 2a20000 {\n"
+ "> +               ftm5: ftm@2a20000 {\n"
  "> +                       reg = <0x0 0x2a20000 0x0 0x10000>;\n"
  "> +                       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +                       status = \"disabled\";\n"
@@ -239,7 +253,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +               wdog0: wdog at 2ad0000 {\n"
+ "> +               wdog0: wdog@2ad0000 {\n"
  "> +                       compatible = \"fsl,ls1021a-wdt\", \"fsl,imx21-wdt\";\n"
  "> +                       reg = <0x0 0x2ad0000 0x0 0x10000>;\n"
  "> +                       interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -255,7 +269,7 @@
  "\n"
  "[...]\n"
  "\n"
- "> +               can0: can at 2a70000 {\n"
+ "> +               can0: can@2a70000 {\n"
  "> +                       compatible = \"fsl,ls1021a-flexcan\";\n"
  "> +                       reg = <0x0 0x2a70000 0x0 0x1000>;\n"
  "> +                       interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -269,7 +283,7 @@
  "Was this mean to have an existing compatible string in the list?\n"
  "\n"
  "> +\n"
- "> +               can1: can at 2a80000 {\n"
+ "> +               can1: can@2a80000 {\n"
  "> +                       compatible = \"fsl,ls1021a-flexcan\";\n"
  "> +                       reg = <0x0 0x2a80000 0x0 0x1000>;\n"
  "> +                       interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -278,7 +292,7 @@
  "> +                       status = \"disabled\";\n"
  "> +               };\n"
  "> +\n"
- "> +               can2: can at 2a90000 {\n"
+ "> +               can2: can@2a90000 {\n"
  "> +                       compatible = \"fsl,ls1021a-flexcan\";\n"
  "> +                       reg = <0x0 0x2a90000 0x0 0x1000>;\n"
  "> +                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -287,7 +301,7 @@
  "> +                       status = \"disabled\";\n"
  "> +               };\n"
  "> +\n"
- "> +               can3: can at 2aa0000 {\n"
+ "> +               can3: can@2aa0000 {\n"
  "> +                       compatible = \"fsl,ls1021a-flexcan\";\n"
  "> +                       reg = <0x0 0x2aa0000 0x0 0x1000>;\n"
  "> +                       interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -297,7 +311,7 @@
  "> +               };\n"
  "> +       };\n"
  "> +\n"
- "> +       dcsr at 20000000 {\n"
+ "> +       dcsr@20000000 {\n"
  "> +               #address-cells = <1>;\n"
  "> +               #size-cells = <1>;\n"
  "> +               compatible = \"fsl,ls1021a-dcsr\", \"simple-bus\";\n"
@@ -313,107 +327,107 @@
  "> +\n"
  "> +               ranges = <0x0 0x0 0x20000000 0x1000000>;\n"
  "> +\n"
- "> +               dcsr-epu at 0 {\n"
+ "> +               dcsr-epu@0 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-epu\";\n"
  "> +                       reg = <0x0 0x10000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-gdi at 100000 {\n"
+ "> +               dcsr-gdi@100000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-gdi\";\n"
  "> +                       reg = <0x100000 0x10000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-dddi at 120000 {\n"
+ "> +               dcsr-dddi@120000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-dddi\";\n"
  "> +                       reg = <0x120000 0x10000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-dcfg at 220000 {\n"
+ "> +               dcsr-dcfg@220000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-dcfg\";\n"
  "> +                       reg = <0x220000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-clock at 221000 {\n"
+ "> +               dcsr-clock@221000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-clock\";\n"
  "> +                       reg = <0x221000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-rcpm at 222000 {\n"
+ "> +               dcsr-rcpm@222000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-rcpm\";\n"
  "> +                       reg = <0x222000 0x1000 0x223000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-ccp at 225000 {\n"
+ "> +               dcsr-ccp@225000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-ccp\";\n"
  "> +                       reg = <0x225000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-fusectrl at 226000 {\n"
+ "> +               dcsr-fusectrl@226000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-fusectrl\";\n"
  "> +                       reg = <0x226000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-dap at 300000 {\n"
+ "> +               dcsr-dap@300000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-dap\";\n"
  "> +                       reg = <0x300000 0x10000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-cstf at 350000 {\n"
+ "> +               dcsr-cstf@350000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-cstf\";\n"
  "> +                       reg = <0x350000 0x1000 0x3a7000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-a7rom at 360000 {\n"
+ "> +               dcsr-a7rom@360000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-a7rom\";\n"
  "> +                       reg = <0x360000 0x10000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-a7cpu at 370000 {\n"
+ "> +               dcsr-a7cpu@370000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-a7cpu\";\n"
  "> +                       reg = <0x370000 0x8000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-a7cti at 378000 {\n"
+ "> +               dcsr-a7cti@378000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-a7cti\";\n"
  "> +                       reg = <0x378000 0x4000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-etm at 37c000 {\n"
+ "> +               dcsr-etm@37c000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-etm\";\n"
  "> +                       reg = <0x37c000 0x1000 0x37d000 0x3000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-hugorom at 3a0000 {\n"
+ "> +               dcsr-hugorom@3a0000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-hugorom\";\n"
  "> +                       reg = <0x3a0000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-etf at 3a1000 {\n"
+ "> +               dcsr-etf@3a1000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-etf\";\n"
  "> +                       reg = <0x3a1000 0x1000 0x3a2000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-etr at 3a3000 {\n"
+ "> +               dcsr-etr@3a3000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-etr\";\n"
  "> +                       reg = <0x3a3000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-cti at 3a4000 {\n"
+ "> +               dcsr-cti@3a4000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-cti\";\n"
  "> +                       reg = <0x3a4000 0x1000 0x3a5000 0x1000 0x3a6000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-atbrepl at 3a8000 {\n"
+ "> +               dcsr-atbrepl@3a8000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-atbrepl\";\n"
  "> +                       reg = <0x3a8000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-tsgen-ctrl at 3a9000 {\n"
+ "> +               dcsr-tsgen-ctrl@3a9000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-tsgen-ctrl\";\n"
  "> +                       reg = <0x3a9000 0x1000>;\n"
  "> +               };\n"
  "> +\n"
- "> +               dcsr-tsgen-read at 3aa000 {\n"
+ "> +               dcsr-tsgen-read@3aa000 {\n"
  "> +                       compatible = \"fsl,ls1021a-dcsr-tsgen-read\";\n"
  "> +                       reg = <0x3aa000 0x1000>;\n"
  "> +               };\n"
@@ -424,8 +438,12 @@
  ">\n"
  "> --\n"
  "> To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
- "> the body of a message to majordomo at vger.kernel.org\n"
+ "> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
  "> More majordomo info at  http://vger.kernel.org/majordomo-info.html\n"
- >
+ ">\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-661c1c4dfd1e3b2c39696d48cd1fbb9bb8a30815d5a2b04b07aaad7835488de0
+2cd4f28dc93226aa2c9844f87f6126133a67c8d68a51f21456f1e09e9202bfa7

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.