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Date: Fri, 4 Jul 2014 00:22:08 +0100
From: Al Viro <viro@ZenIV.linux.org.uk>
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Sender: Al Viro <viro@ftp.linux.org.uk>
Subject: Re: [Qemu-devel] [RFC] alpha qemu arithmetic exceptions
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>, Richard Henderson <rth@twiddle.net>

On Fri, Jul 04, 2014 at 12:05:37AM +0100, Peter Maydell wrote:
> On 3 July 2014 23:47, Al Viro <viro@zeniv.linux.org.uk> wrote:
> > How can that be correct?  Suppose a = b = 0.  We get
> > tcg_gen_eqv_i64(tmp, va, vb);   ->      tmp = -1
> > tcg_gen_mov_i64(tmp2, va);      ->      tmp2 = 0
> > tcg_gen_add_i64(vc, va, vb);    ->      c = 0
> > tcg_gen_xor_i64(tmp2, tmp2, vc);->      tmp2 = 0
> > tcg_gen_and_i64(tmp, tmp, tmp2);->      tmp = -1
> 
> tmp2 here is 0, so the result of this AND is 0, not -1...

Doh.  Misread it as tcg_gen_add_i64, sorry.

Hmm...  So it's ((a ^ ~b) & (a ^ c) < 0 as overflow condition, IOW
MSB(a) == MSB(b) && MSB(c) != MSB(a).  OK, that works; might deserve
a comment, though...