From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44140) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X5NcY-0003a4-Fe for qemu-devel@nongnu.org; Thu, 10 Jul 2014 19:19:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X5NcS-0006Il-Fz for qemu-devel@nongnu.org; Thu, 10 Jul 2014 19:19:22 -0400 Received: from mail-ig0-x232.google.com ([2607:f8b0:4001:c05::232]:59069) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X5NcS-0006Hk-AZ for qemu-devel@nongnu.org; Thu, 10 Jul 2014 19:19:16 -0400 Received: by mail-ig0-f178.google.com with SMTP id hn18so378724igb.17 for ; Thu, 10 Jul 2014 16:19:14 -0700 (PDT) Date: Fri, 11 Jul 2014 09:17:52 +1000 From: "Edgar E. Iglesias" Message-ID: <20140710231752.GA13728@toto> References: <1402994746-8328-1-git-send-email-edgar.iglesias@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1402994746-8328-1-git-send-email-edgar.iglesias@gmail.com> Subject: Re: [Qemu-devel] [PATCH v3 00/16] target-arm: Parts of the AArch64 EL2/3 exception model List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: rob.herring@linaro.org, peter.crosthwaite@xilinx.com, aggelerf@ethz.ch, agraf@suse.de, blauwirbel@gmail.com, john.williams@xilinx.com, greg.bellows@linaro.org, pbonzini@redhat.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, rth@twiddle.net Ping! PMM, are you expecting me to change something with this series that I've missed or is it just busy times for review? Cheers, Edgar On Tue, Jun 17, 2014 at 06:45:30PM +1000, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > Hi, > > This is a second round of AArch64 EL2/3 patches working on the exception > model. Among other things adding HVC/SMC, interrupt routing to EL2/3 and > Virtual IRQs/FIQs. The VIRQ/VFIQ support only adds the external signal > delivery method. > > Patch 3 is a bug fix. > Patch 14 fails checkpatch, seems like a bug in checkpatch, CC:d Blue. > > This conflicts slightly with the PSCI emulation patches that Rob posted. > A rebase should be trivial, hooking in the PSCI emulation calls in the > HVC/SMC helpers. > > Cheers, > Edgar > > v2 -> v3: > * Add more HCR bitfield macros > * Flush TLB on hcr_write change of HCR RW, DC and PTW. > * Fix hvc helper, HVC is undefined in secure mode. > * Remove uint16_t imm16 syndrome gen change. > * Replace c1_scr with scr_el3 > > v1 -> v2: > * Avoid imm16 mask in syndrome generation > * Use g_assert_not_reached() in arm_excp_unmasked() > * Avoid some logic duplication in arm_excp_target_el and arm_excp_unmasked. > * Put arm_excp_target_el in helper.c to start with. > * Fix SMC disable (SMD or SCD) for ARMv7 only applies if EL2 exists > * SCR_RES0_MASK -> SCR_MASK > * HCR_RES0_MASK -> HCR_MASK > * Fix SMC routing to EL2, only applies for NS EL1. > * Fix CPreg defs for ESR_EL2/3 > * Fix SMC helper, SMC routing to EL2 and SCR.SMD for AArch32. > > Edgar E. Iglesias (16): > target-arm: A64: Break out aarch64_save/restore_sp > target-arm: A64: Respect SPSEL in ERET SP restore > target-arm: A64: Respect SPSEL when taking exceptions > target-arm: Make far_el1 an array > target-arm: Add ESR_EL2 and 3 > target-arm: Add FAR_EL2 and 3 > target-arm: Add HCR_EL2 > target-arm: Add SCR_EL3 > target-arm: A64: Refactor aarch64_cpu_do_interrupt > target-arm: Break out exception masking to a separate func > target-arm: Don't take interrupts targeting lower ELs > target-arm: A64: Correct updates to FAR and ESR on exceptions > target-arm: A64: Emulate the HVC insn > target-arm: A64: Emulate the SMC insn > target-arm: Add IRQ and FIQ routing to EL2 and 3 > target-arm: Add support for VIRQ and VFIQ > > cpu-exec.c | 17 +++++- > target-arm/cpu.c | 22 ++++++- > target-arm/cpu.h | 120 ++++++++++++++++++++++++++++++++++++- > target-arm/helper-a64.c | 32 +++++----- > target-arm/helper.c | 145 ++++++++++++++++++++++++++++++++++++++++++--- > target-arm/helper.h | 2 + > target-arm/internals.h | 43 +++++++++++--- > target-arm/kvm64.c | 13 +--- > target-arm/op_helper.c | 68 +++++++++++++++++++-- > target-arm/translate-a64.c | 31 ++++++++-- > 10 files changed, 433 insertions(+), 60 deletions(-) > > -- > 1.8.3.2 >