From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tony Lindgren Subject: Re: [PATCH v2] ARM: OMAP2+: l2c: squelch warning dump on power control setting Date: Mon, 14 Jul 2014 09:25:52 -0700 Message-ID: <20140714162551.GG20068@atomide.com> References: <53C3E9BD.9010104@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from mho-02-ewr.mailhop.org ([204.13.248.72]:48799 "EHLO mho-02-ewr.mailhop.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755884AbaGNQ1Q (ORCPT ); Mon, 14 Jul 2014 12:27:16 -0400 Content-Disposition: inline In-Reply-To: <53C3E9BD.9010104@ti.com> Sender: linux-omap-owner@vger.kernel.org List-Id: linux-omap@vger.kernel.org To: Santosh Shilimkar Cc: Sekhar Nori , Linux OMAP Mailing List , Nishanth Menon , Felipe Balbi , Linux ARM Mailing List , Russell King * Santosh Shilimkar [140714 07:33]: > On Monday 14 July 2014 09:13 AM, Sekhar Nori wrote: > > On OMAP SOCs using PL310 controllers, power_ctrl register is not > > accessible from non-secure software even on PL310 versions which > > support it. The secure code takes care of setting it up correctly > > and power transitions are proven on these devices. > > > > For example, AM437x has L2C-310 version r3p3 and ROM code on that > > device does not support writing to L2C-310 power control register. > > The L2C driver, however, tries writing to this register for all > > revisions >= r3p0. > > > > This leads to a warning dump on boot which leads most users to believe > > that L2 cache is non-functional. > > > > Since the problem is understood, and cannot be addressed through > > software, replace the warning with a pr_info() while maintaining the > > WARN_ON() for other truly unexpected scenarios. > > > > Reported-by: Nishanth Menon > > Tested-by: Felipe Balbi > > Signed-off-by: Sekhar Nori > > --- > > Only description updated since v1 > > > Thanks for update. > Acked-by: Santosh Shilimkar > Thanks applying into omap-for-v3.16/fixes. Tony From mboxrd@z Thu Jan 1 00:00:00 1970 From: tony@atomide.com (Tony Lindgren) Date: Mon, 14 Jul 2014 09:25:52 -0700 Subject: [PATCH v2] ARM: OMAP2+: l2c: squelch warning dump on power control setting In-Reply-To: <53C3E9BD.9010104@ti.com> References: <53C3E9BD.9010104@ti.com> Message-ID: <20140714162551.GG20068@atomide.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org * Santosh Shilimkar [140714 07:33]: > On Monday 14 July 2014 09:13 AM, Sekhar Nori wrote: > > On OMAP SOCs using PL310 controllers, power_ctrl register is not > > accessible from non-secure software even on PL310 versions which > > support it. The secure code takes care of setting it up correctly > > and power transitions are proven on these devices. > > > > For example, AM437x has L2C-310 version r3p3 and ROM code on that > > device does not support writing to L2C-310 power control register. > > The L2C driver, however, tries writing to this register for all > > revisions >= r3p0. > > > > This leads to a warning dump on boot which leads most users to believe > > that L2 cache is non-functional. > > > > Since the problem is understood, and cannot be addressed through > > software, replace the warning with a pr_info() while maintaining the > > WARN_ON() for other truly unexpected scenarios. > > > > Reported-by: Nishanth Menon > > Tested-by: Felipe Balbi > > Signed-off-by: Sekhar Nori > > --- > > Only description updated since v1 > > > Thanks for update. > Acked-by: Santosh Shilimkar > Thanks applying into omap-for-v3.16/fixes. Tony