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Date: Tue, 29 Jul 2014 00:32:36 +0200
From: Aurelien Jarno <aurelien@aurel32.net>
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Subject: Re: [Qemu-devel] [PATCH 2/2] target-mips/translate.c: Add judgement
 for msb and lsb
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: Dongxue Zhang <elta.era@gmail.com>, QEMU Developers <qemu-devel@nongnu.org>

On Mon, Jul 28, 2014 at 11:01:02PM +0100, Peter Maydell wrote:
> On 28 July 2014 22:42, Aurelien Jarno <aurelien@aurel32.net> wrote:
> > On Mon, Jul 28, 2014 at 11:58:22PM +0800, Dongxue Zhang wrote:
> >> Use 'if' to make sure the real msb greater than the lsb. As the compiler may
> >> not do this.
> >
> > What are you trying to fix exactly? These cases are defined as
> > "unpredictable" in the MIPS ISA manual, which is what is implemented in
> > QEMU.
> 
> This may be true, but the TCG README doesn't define negative
> lengths as being "unspecified behaviour" (ie guaranteed to at
> least not crash even if the result isn't specified), and in fact the
> implementation of tcg_gen_deposit will assert on negative lengths.
> We shouldn't implement guest unpredictable cases as "crash QEMU".

Well I tried this code under QEMU, and it clearly doesn't crash. It
seems the assert are not enabled with the default configuration options.
That said I agree it's something to avoid, but I don't think triggering
a RI exception is the thing to do (even if it is correct according the
MIPS ISA manual) when real silicon output a random result instead.

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net