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diff for duplicates of <20140730154626.GD20162@leverpostej>

diff --git a/a/1.txt b/N1/1.txt
index f632bad..c31ad58 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,15 +1,15 @@
 Hi,
 
 On Wed, Jul 30, 2014 at 04:06:31PM +0100, Robert Richter wrote:
-> From: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
+> From: Radha Mohan Chintakuntla <rchintakuntla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
 > 
 > Add initial device tree nodes for Cavium Thunder SoCs with support of
 > 48 cores and gicv3. The dts file requires further changes, esp. for
 > pci, gicv3-its and smmu. This changes will be added later together
 > with the device drivers.
 > 
-> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
-> Signed-off-by: Robert Richter <rrichter@cavium.com>
+> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
+> Signed-off-by: Robert Richter <rrichter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
 > ---
 >  arch/arm64/boot/dts/Makefile         |   1 +
 >  arch/arm64/boot/dts/thunder-88xx.dts | 387 +++++++++++++++++++++++++++++++++++
@@ -81,7 +81,7 @@ Nice!
 > +		#address-cells = <2>;
 > +		#size-cells = <0>;
 > +
-> +		cpu at 000 {
+> +		cpu@000 {
 > +			device_type = "cpu";
 > +			compatible = "cavium,thunder", "arm,armv8";
 > +			reg = <0x0 0x000>;
@@ -93,12 +93,12 @@ Just to check: both the SoC and CPU are called thunder?
 [...]
 
 > +
-> +	memory at 00000000 {
+> +	memory@00000000 {
 > +		device_type = "memory";
 > +		reg = <0x0 0x00000000 0x0 0x80000000>;
 > +	};
 > +
-> +	gic0: interrupt-controller at 801000000000 {
+> +	gic0: interrupt-controller@801000000000 {
 
 To make this easier to read, please place a comma between 32-bit
 portions of the unit address (e.g. here have 8010,00000000).
@@ -148,7 +148,7 @@ This has no children, so why have ranges, #address-cells, and
 Please get rid of the clocks node and just put the clocks here.
 
 > +
-> +		uaa0: serial at 87e024000000 {
+> +		uaa0: serial@87e024000000 {
 > +			compatible = "arm,pl011", "arm,primecell";
 > +			reg = <0x87e0 0x24000000 0x0 0x1000>;
 > +			interrupts = <1 21 4>;
@@ -160,7 +160,7 @@ latter.
 
 > +		};
 > +
-> +		uaa1: serial at 87e025000000 {
+> +		uaa1: serial@87e025000000 {
 > +			compatible = "arm,pl011", "arm,primecell";
 > +			reg = <0x87e0 0x25000000 0x0 0x1000>;
 > +			interrupts = <1 22 4>;
@@ -171,3 +171,7 @@ Similarly?
 
 Thanks,
 Mark.
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index fa1a8ef..efeb249 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,23 +1,36 @@
  "ref\01406732794-20920-1-git-send-email-rric@kernel.org\0"
  "ref\01406732794-20920-3-git-send-email-rric@kernel.org\0"
- "From\0mark.rutland@arm.com (Mark Rutland)\0"
- "Subject\0[PATCH 2/5] arm64, thunder: Add initial dts for Cavium Thunder SoC\0"
+ "ref\01406732794-20920-3-git-send-email-rric-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org\0"
+ "From\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\0"
+ "Subject\0Re: [PATCH 2/5] arm64, thunder: Add initial dts for Cavium Thunder SoC\0"
  "Date\0Wed, 30 Jul 2014 16:46:26 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Robert Richter <rric-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0"
+ "Cc\0Catalin Marinas <Catalin.Marinas-5wv7dgnIgG8@public.gmane.org>"
+  Will Deacon <Will.Deacon-5wv7dgnIgG8@public.gmane.org>
+  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
+  Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
+  Pawel Moll <Pawel.Moll-5wv7dgnIgG8@public.gmane.org>
+  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
+  Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
+  Radha Mohan Chintakuntla <rchintakuntla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
+  Robert Richter <rrichter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
+ " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0"
  "\00:1\0"
  "b\0"
  "Hi,\n"
  "\n"
  "On Wed, Jul 30, 2014 at 04:06:31PM +0100, Robert Richter wrote:\n"
- "> From: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>\n"
+ "> From: Radha Mohan Chintakuntla <rchintakuntla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n"
  "> \n"
  "> Add initial device tree nodes for Cavium Thunder SoCs with support of\n"
  "> 48 cores and gicv3. The dts file requires further changes, esp. for\n"
  "> pci, gicv3-its and smmu. This changes will be added later together\n"
  "> with the device drivers.\n"
  "> \n"
- "> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>\n"
- "> Signed-off-by: Robert Richter <rrichter@cavium.com>\n"
+ "> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n"
+ "> Signed-off-by: Robert Richter <rrichter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n"
  "> ---\n"
  ">  arch/arm64/boot/dts/Makefile         |   1 +\n"
  ">  arch/arm64/boot/dts/thunder-88xx.dts | 387 +++++++++++++++++++++++++++++++++++\n"
@@ -89,7 +102,7 @@
  "> +\t\t#address-cells = <2>;\n"
  "> +\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\tcpu at 000 {\n"
+ "> +\t\tcpu@000 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x000>;\n"
@@ -101,12 +114,12 @@
  "[...]\n"
  "\n"
  "> +\n"
- "> +\tmemory at 00000000 {\n"
+ "> +\tmemory@00000000 {\n"
  "> +\t\tdevice_type = \"memory\";\n"
  "> +\t\treg = <0x0 0x00000000 0x0 0x80000000>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tgic0: interrupt-controller at 801000000000 {\n"
+ "> +\tgic0: interrupt-controller@801000000000 {\n"
  "\n"
  "To make this easier to read, please place a comma between 32-bit\n"
  "portions of the unit address (e.g. here have 8010,00000000).\n"
@@ -156,7 +169,7 @@
  "Please get rid of the clocks node and just put the clocks here.\n"
  "\n"
  "> +\n"
- "> +\t\tuaa0: serial at 87e024000000 {\n"
+ "> +\t\tuaa0: serial@87e024000000 {\n"
  "> +\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n"
  "> +\t\t\treg = <0x87e0 0x24000000 0x0 0x1000>;\n"
  "> +\t\t\tinterrupts = <1 21 4>;\n"
@@ -168,7 +181,7 @@
  "\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tuaa1: serial at 87e025000000 {\n"
+ "> +\t\tuaa1: serial@87e025000000 {\n"
  "> +\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n"
  "> +\t\t\treg = <0x87e0 0x25000000 0x0 0x1000>;\n"
  "> +\t\t\tinterrupts = <1 22 4>;\n"
@@ -178,6 +191,10 @@
  "Similarly?\n"
  "\n"
  "Thanks,\n"
- Mark.
+ "Mark.\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-3fdfd8d72d394b3f13fa2af9c0452db9e00910c8d6763ce3132f69f6976eddd1
+1e4b335bb7ce1e22538b993d1415ce755c9df91da15635b63beb09a3fb8230c9

diff --git a/a/1.txt b/N2/1.txt
index f632bad..2d5ceac 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -81,7 +81,7 @@ Nice!
 > +		#address-cells = <2>;
 > +		#size-cells = <0>;
 > +
-> +		cpu at 000 {
+> +		cpu@000 {
 > +			device_type = "cpu";
 > +			compatible = "cavium,thunder", "arm,armv8";
 > +			reg = <0x0 0x000>;
@@ -93,12 +93,12 @@ Just to check: both the SoC and CPU are called thunder?
 [...]
 
 > +
-> +	memory at 00000000 {
+> +	memory@00000000 {
 > +		device_type = "memory";
 > +		reg = <0x0 0x00000000 0x0 0x80000000>;
 > +	};
 > +
-> +	gic0: interrupt-controller at 801000000000 {
+> +	gic0: interrupt-controller@801000000000 {
 
 To make this easier to read, please place a comma between 32-bit
 portions of the unit address (e.g. here have 8010,00000000).
@@ -148,7 +148,7 @@ This has no children, so why have ranges, #address-cells, and
 Please get rid of the clocks node and just put the clocks here.
 
 > +
-> +		uaa0: serial at 87e024000000 {
+> +		uaa0: serial@87e024000000 {
 > +			compatible = "arm,pl011", "arm,primecell";
 > +			reg = <0x87e0 0x24000000 0x0 0x1000>;
 > +			interrupts = <1 21 4>;
@@ -160,7 +160,7 @@ latter.
 
 > +		};
 > +
-> +		uaa1: serial at 87e025000000 {
+> +		uaa1: serial@87e025000000 {
 > +			compatible = "arm,pl011", "arm,primecell";
 > +			reg = <0x87e0 0x25000000 0x0 0x1000>;
 > +			interrupts = <1 22 4>;
diff --git a/a/content_digest b/N2/content_digest
index fa1a8ef..c7a7c71 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,9 +1,21 @@
  "ref\01406732794-20920-1-git-send-email-rric@kernel.org\0"
  "ref\01406732794-20920-3-git-send-email-rric@kernel.org\0"
- "From\0mark.rutland@arm.com (Mark Rutland)\0"
- "Subject\0[PATCH 2/5] arm64, thunder: Add initial dts for Cavium Thunder SoC\0"
+ "From\0Mark Rutland <mark.rutland@arm.com>\0"
+ "Subject\0Re: [PATCH 2/5] arm64, thunder: Add initial dts for Cavium Thunder SoC\0"
  "Date\0Wed, 30 Jul 2014 16:46:26 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Robert Richter <rric@kernel.org>\0"
+ "Cc\0Catalin Marinas <Catalin.Marinas@arm.com>"
+  Will Deacon <Will.Deacon@arm.com>
+  Rob Herring <robh+dt@kernel.org>
+  Arnd Bergmann <arnd@arndb.de>
+  Pawel Moll <Pawel.Moll@arm.com>
+  Ian Campbell <ijc+devicetree@hellion.org.uk>
+  Kumar Gala <galak@codeaurora.org>
+  linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
+  linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>
+  Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
+  Robert Richter <rrichter@cavium.com>
+ " devicetree@vger.kernel.org <devicetree@vger.kernel.org>\0"
  "\00:1\0"
  "b\0"
  "Hi,\n"
@@ -89,7 +101,7 @@
  "> +\t\t#address-cells = <2>;\n"
  "> +\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\tcpu at 000 {\n"
+ "> +\t\tcpu@000 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n"
  "> +\t\t\treg = <0x0 0x000>;\n"
@@ -101,12 +113,12 @@
  "[...]\n"
  "\n"
  "> +\n"
- "> +\tmemory at 00000000 {\n"
+ "> +\tmemory@00000000 {\n"
  "> +\t\tdevice_type = \"memory\";\n"
  "> +\t\treg = <0x0 0x00000000 0x0 0x80000000>;\n"
  "> +\t};\n"
  "> +\n"
- "> +\tgic0: interrupt-controller at 801000000000 {\n"
+ "> +\tgic0: interrupt-controller@801000000000 {\n"
  "\n"
  "To make this easier to read, please place a comma between 32-bit\n"
  "portions of the unit address (e.g. here have 8010,00000000).\n"
@@ -156,7 +168,7 @@
  "Please get rid of the clocks node and just put the clocks here.\n"
  "\n"
  "> +\n"
- "> +\t\tuaa0: serial at 87e024000000 {\n"
+ "> +\t\tuaa0: serial@87e024000000 {\n"
  "> +\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n"
  "> +\t\t\treg = <0x87e0 0x24000000 0x0 0x1000>;\n"
  "> +\t\t\tinterrupts = <1 21 4>;\n"
@@ -168,7 +180,7 @@
  "\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tuaa1: serial at 87e025000000 {\n"
+ "> +\t\tuaa1: serial@87e025000000 {\n"
  "> +\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n"
  "> +\t\t\treg = <0x87e0 0x25000000 0x0 0x1000>;\n"
  "> +\t\t\tinterrupts = <1 22 4>;\n"
@@ -180,4 +192,4 @@
  "Thanks,\n"
  Mark.
 
-3fdfd8d72d394b3f13fa2af9c0452db9e00910c8d6763ce3132f69f6976eddd1
+44e65ec9611b1c2944cc3bec431264eaca1865a67478cda4c7e48093226a99c4

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