Re: [Qemu-devel] [PATCH v3 12/16] target-arm: A64: Correct updates to FAR and ESR on exceptions

["Edgar E. Iglesias" <edgar.iglesias@gmail.com>]

On Fri, Aug 01, 2014 at 02:56:29PM +0100, Peter Maydell wrote:
> On 17 June 2014 09:45, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> >
> > Not all exception types update both FAR and ESR.
> >
> > Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> > Reviewed-by: Greg Bellows <greg.bellows@linaro.org>
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
> >  target-arm/helper-a64.c | 6 ++----
> >  1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
> > index 4be0784..cf8ce1e 100644
> > --- a/target-arm/helper-a64.c
> > +++ b/target-arm/helper-a64.c
> > @@ -466,18 +466,16 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
> >                        env->exception.syndrome);
> >      }
> >
> > -    env->cp15.esr_el[new_el] = env->exception.syndrome;
> > -    env->cp15.far_el[new_el] = env->exception.vaddress;
> > -
> >      switch (cs->exception_index) {
> >      case EXCP_PREFETCH_ABORT:
> >      case EXCP_DATA_ABORT:
> > +        env->cp15.far_el[new_el] = env->exception.vaddress;
> >          qemu_log_mask(CPU_LOG_INT, "...with FAR 0x%" PRIx64 "\n",
> >                        env->cp15.far_el[new_el]);
> > -        break;
> 
> If you want this to fall through, you need a /* fall through */ comment.

Added, thanks.

> 
> >      case EXCP_BKPT:
> >      case EXCP_UDEF:
> >      case EXCP_SWI:
> > +        env->cp15.esr_el[new_el] = env->exception.syndrome;
> >          break;
> >      case EXCP_IRQ:
> >          addr += 0x80;
> > --
> 
> thanks
> -- PMM