Re: [PATCH 2/7] drm/i915: Add thread stall DOP clock gating workaround on Broadwell.

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Ben Widawsky <ben@bwidawsk.net>
Subject: Re: [PATCH 2/7] drm/i915: Add thread stall DOP clock gating workaround on Broadwell.
Date: Tue, 5 Aug 2014 20:10:28 +0300	[thread overview]
Message-ID: <20140805171028.GP4193@intel.com> (raw)
In-Reply-To: <1407176119-5294-2-git-send-email-rodrigo.vivi@intel.com>

On Mon, Aug 04, 2014 at 11:15:14AM -0700, Rodrigo Vivi wrote:
> From: Kenneth Graunke <kenneth@whitecape.org>
> 
> Ben and I believe this will be necessary on production hardware.
> 
> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 684dc5f..f919596 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5412,6 +5412,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
>  	I915_WRITE(GEN8_ROW_CHICKEN,
>  		   _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));
>  
> +	/* WaDisableThreadStallDopClockGating:bdw */
> +	I915_WRITE(GEN8_ROW_CHICKEN,
> +		   _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));

It's already there just above.

> +
>  	/*
>  	 * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
>  	 * pre-production hardware
> -- 
> 1.9.3
> 
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-- 
Ville Syrjälä
Intel OTC