Re: [PATCH 1/4] host1x: mipi: Add new parent clock for mipi calibration

[Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

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On Thu, Aug 07, 2014 at 02:11:44AM -0400, Sean Paul wrote:
> This patch adds a new parent clock to enable/disable the 72MHz
> clock required for mipi calibration.

s/mipi/MIPI/ please. Also this doesn't explain why this change is
necessary. Doesn't MIPI D-PHY calibration work without this patch? It
sure does for me.

Furthermore you say 72 MHz clock, but the below uses PLL_P_OUT3 as the
parent in the example, yet PLL_P_OUT3 runs at 102 MHz on all of my
systems. What 72 MHz clock are you referring to?

Also can this parent clock ever be anything other than PLL_P_OUT3? If
not it would probably be better to set that statically in the clock
initialization tables.

> diff --git a/drivers/gpu/host1x/mipi.c b/drivers/gpu/host1x/mipi.c
> index 9882ea1..4dd91fd 100644
> --- a/drivers/gpu/host1x/mipi.c
> +++ b/drivers/gpu/host1x/mipi.c
> @@ -80,7 +80,8 @@ static const struct module {
>  struct tegra_mipi {
>  	void __iomem *regs;
>  	struct mutex lock;
> -	struct clk *clk;
> +	struct clk *clk_parent;
> +	struct clk *clk_mipi_cal;

I don't think the clk -> clk_mipi_cal rename is warranted here.

Thierry

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