From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/2] arm64: add helper functions to read I-cache attributes
Date: Thu, 7 Aug 2014 18:27:19 +0100 [thread overview]
Message-ID: <20140807172719.GE31101@arm.com> (raw)
In-Reply-To: <1407339966-29351-1-git-send-email-ard.biesheuvel@linaro.org>
On Wed, Aug 06, 2014 at 04:46:05PM +0100, Ard Biesheuvel wrote:
> This adds helper functions and #defines to <asm/cachetype.h> to read the
> line size and the number of sets from the level 1 instruction cache.
>
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> v3: add WARN_ON(preemptible()), move icache_get_ccsidr() to cpuinfo.c to
> prevent #include header recursion hell
> v2: put () around macro args, use 64-bit types for asm() mrs/msr calls
>
> arch/arm64/include/asm/cachetype.h | 20 ++++++++++++++++++++
> arch/arm64/kernel/cpuinfo.c | 14 ++++++++++++++
> 2 files changed, 34 insertions(+)
Acked-by: Will Deacon <will.deacon@arm.com>
Will
prev parent reply other threads:[~2014-08-07 17:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-06 15:46 [PATCH v3 1/2] arm64: add helper functions to read I-cache attributes Ard Biesheuvel
2014-08-06 15:46 ` [PATCH v3 2/2] arm64: don't flag non-aliasing VIPT I-caches as aliasing Ard Biesheuvel
2014-08-07 17:28 ` Will Deacon
2014-08-07 17:27 ` Will Deacon [this message]
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