From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Arun Siluvery <arun.siluvery@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915/bdw: Apply workarounds using the golden render state
Date: Wed, 20 Aug 2014 17:52:54 +0300 [thread overview]
Message-ID: <20140820145254.GI4193@intel.com> (raw)
In-Reply-To: <1408544358-26735-2-git-send-email-arun.siluvery@linux.intel.com>
On Wed, Aug 20, 2014 at 03:19:17PM +0100, Arun Siluvery wrote:
> Workarounds for bdw are currently applied in init_clock_gating() but they
> are lost following a gpu reset. Some of the WA registers are part of register
> state context and they are restored with every context switch so initializing
> them in golden render state ensures that they are applied even when we start
> with an uninitialized context or during hw initlialization followed by a reset.
>
> v2: Add comments corresponding to WAs in golden render state (Chris).
>
> The generation of render state is not a straighforward process, it would
> be ideal to augment WA values from during the setup state as opposed to
> using a tool but that would be a follow up patch.
I'd still prefer just emitting the LRIs from code rather tha mucking
about with null batch. Less hoops to jump through when adding a new w/a.
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2014-08-20 14:53 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-20 14:19 [PATCH 0/2] Add BDW workarounds using golden render state Arun Siluvery
2014-08-20 14:19 ` [PATCH 1/2] drm/i915/bdw: Apply workarounds using the " Arun Siluvery
2014-08-20 14:24 ` Chris Wilson
2014-08-20 14:52 ` Ville Syrjälä [this message]
2014-08-22 11:06 ` Mika Kuoppala
2014-08-22 12:10 ` Siluvery, Arun
2014-08-26 12:53 ` Daniel Vetter
2014-08-26 12:57 ` Siluvery, Arun
2014-08-26 13:37 ` Daniel Vetter
2014-08-20 14:19 ` [PATCH 2/2] drm/i915/bdw: Extract workaround registers data from " Arun Siluvery
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