From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 1/3] drm/i915: call lpt_init_clock_gating on BDW too Date: Tue, 26 Aug 2014 19:16:34 +0200 Message-ID: <20140826171634.GE15520@phenom.ffwll.local> References: <1408651778-2636-1-git-send-email-przanoni@gmail.com> <20140821215038.GD29975@strange.ger.corp.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f180.google.com (mail-wi0-f180.google.com [209.85.212.180]) by gabe.freedesktop.org (Postfix) with ESMTP id D1D0E6E395 for ; Tue, 26 Aug 2014 10:16:12 -0700 (PDT) Received: by mail-wi0-f180.google.com with SMTP id n3so4523238wiv.7 for ; Tue, 26 Aug 2014 10:16:11 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140821215038.GD29975@strange.ger.corp.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Damien Lespiau Cc: rodrigo.vivi@intel.com, intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Thu, Aug 21, 2014 at 10:50:38PM +0100, Damien Lespiau wrote: > On Thu, Aug 21, 2014 at 05:09:36PM -0300, Paulo Zanoni wrote: > > From: Paulo Zanoni > > > > Because BDW has WPT, which is equivalent to LPT. This is just like the > > CPT/PPT case. > > > > Signed-off-by: Paulo Zanoni > > It'd be probably good to have drm/i915/bdw: in the subject to ease back > porting for product groups, and add those patches to a list someone > maintains (Rodrigo?) Forgotten your r-b tag or intentionally left blank? -Daniel > > -- > Damien > > > --- > > drivers/gpu/drm/i915/intel_pm.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index c8f744c..b3e948f 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -5595,6 +5595,8 @@ static void gen8_init_clock_gating(struct drm_device *dev) > > /* Wa4x4STCOptimizationDisable:bdw */ > > I915_WRITE(CACHE_MODE_1, > > _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE)); > > + > > + lpt_init_clock_gating(dev); > > } > > > > static void haswell_init_clock_gating(struct drm_device *dev) > > -- > > 2.0.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch