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From: shengjiu.wang@freescale.com (Shengjiu Wang)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 1/2] ARM: imx: add BYPASS support for PLL clocks
Date: Fri, 29 Aug 2014 09:49:50 +0800	[thread overview]
Message-ID: <20140829014947.GA2741@audiosh1> (raw)
In-Reply-To: <20140828084420.GG28777@dragon>

On Thu, Aug 28, 2014 at 04:44:21PM +0800, Shawn Guo wrote:
> On Tue, Aug 26, 2014 at 11:35:12PM +0800, Shawn Guo wrote:
> > The i.MX6 clock drivers currently hard-code all PLL clocks sourcing from
> > OSC24M without BYPASS support.  The patch adds BYPASS and BYPASS_CLK_SRC
> > selection for PLL clocks as per Figure 10-3. Primary Clock Generation
> > in IMX6DQRM, i.e. both BYPASS_CLK_SRC and BYPASS bits are implemented as
> > mux clocks, and ENABLE bit of PLL clocks is implemented as a gate clock
> > after BYPASS mux.
> > 
> > Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
> 
> Shengjiu,
> 
> Can you please test if this BYPASS support works good for your ESAI use
> case?
> 
> Shawn

Yes, after test, one issue found. Please check.

-static const char *pll_bypass_src_sels[] = { "osc", "anaclk1", "anaclk2", "dummy", };
+static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", "lvds2_in", "dummy", };

best regrads
wang shengjiu

  reply	other threads:[~2014-08-29  1:49 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-26 15:35 [RFC PATCH 0/2] ARM: imx6: add BYPASS support for PLLs Shawn Guo
2014-08-26 15:35 ` [RFC PATCH 1/2] ARM: imx: add BYPASS support for PLL clocks Shawn Guo
2014-08-28  8:44   ` Shawn Guo
2014-08-29  1:49     ` Shengjiu Wang [this message]
2014-08-29  2:53       ` Shawn Guo
2014-08-29  3:33         ` Shengjiu Wang
2014-08-29  8:41           ` Shawn Guo
2014-08-29  9:32             ` Shengjiu Wang
2014-08-29 10:33               ` Shawn Guo
2014-08-26 15:35 ` [RFC PATCH 2/2] ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver Shawn Guo

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