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diff for duplicates of <20140901114238.GB24594@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index 8e56f9a..829a51d 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,7 +1,7 @@
 Hi Tirumalesh,
 
-On Wed, Aug 27, 2014 at 07:02:21PM +0100, c.tirumalesh-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote:
-> From: Tirumalesh Chalamarla <tchalamarla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
+On Wed, Aug 27, 2014 at 07:02:21PM +0100, c.tirumalesh at gmail.com wrote:
+> From: Tirumalesh Chalamarla <tchalamarla@cavium.com>
 > 
 > This patch modifes output_mask calculation logic for stage 1 and allow
 > max possible value supported by SMMU implementaions for translations,
diff --git a/a/content_digest b/N1/content_digest
index 8cb9fe2..72649f3 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,21 +1,14 @@
  "ref\01409162541-3940-1-git-send-email-c.tirumalesh@gmail.com\0"
- "ref\01409162541-3940-1-git-send-email-c.tirumalesh-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0"
- "From\0Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\0"
- "Subject\0Re: [PATCH] iommu/arm-smmu: Allow size of stage 1 output to max possible value for sateg 2 bypass\0"
+ "From\0will.deacon@arm.com (Will Deacon)\0"
+ "Subject\0[PATCH] iommu/arm-smmu: Allow size of stage 1 output to max possible value for sateg 2 bypass\0"
  "Date\0Mon, 1 Sep 2014 12:42:38 +0100\0"
- "To\0c.tirumalesh-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org <c.tirumalesh-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
- "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>"
-  Prasun.Kapoor-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org <Prasun.Kapoor-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
-  Tirumalesh Chalamarla <tchalamarla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
-  iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>
-  tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi Tirumalesh,\n"
  "\n"
- "On Wed, Aug 27, 2014 at 07:02:21PM +0100, c.tirumalesh-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote:\n"
- "> From: Tirumalesh Chalamarla <tchalamarla-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>\n"
+ "On Wed, Aug 27, 2014 at 07:02:21PM +0100, c.tirumalesh at gmail.com wrote:\n"
+ "> From: Tirumalesh Chalamarla <tchalamarla@cavium.com>\n"
  "> \n"
  "> This patch modifes output_mask calculation logic for stage 1 and allow\n"
  "> max possible value supported by SMMU implementaions for translations,\n"
@@ -68,4 +61,4 @@
  "        /* The stage-2 output mask is also applied for bypass */\n"
          size = arm_smmu_id_size_to_bits((id >> ID2_OAS_SHIFT) & ID2_OAS_MASK);
 
-27cccd844ff8a0bf460b6047ae75e205728f9ea6892e786596d9f812a2d47fe7
+9bb228117f4189e335c23f344b4b9f454dac99e58f22361188ca8fc36c86c03a

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