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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 2/2] drm/i915: allow sync points within batches
Date: Wed, 3 Sep 2014 12:48:27 -0700	[thread overview]
Message-ID: <20140903124827.2b92032b@jbarnes-desktop> (raw)
In-Reply-To: <CAKMK7uErw0UipuUvjO4sFFv5rnymvN1JXN25pToV2FYXCTbnjw@mail.gmail.com>

On Wed, 3 Sep 2014 21:41:02 +0200
Daniel Vetter <daniel@ffwll.ch> wrote:

> On Wed, Sep 3, 2014 at 9:01 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > On Wed, 3 Sep 2014 17:08:53 +0100
> > Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >> On Wed, Sep 03, 2014 at 08:41:06AM -0700, Jesse Barnes wrote:
> >> > On Wed, 3 Sep 2014 08:01:55 +0100
> >> > Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >> >
> >> > > These commands are illegal/invalid inside the object, only valid inside
> >> > > the ring.
> >> >
> >> > Hm, we ought to be able to write to no privileged space with
> >> > STORE_DWORD, but that does mean moving to context specific pages in
> >> > process space, or at least adding them to our existing scheme.
> >>
> >> The per-process context page also doesn't exist generically. I certainly
> >> hope that userspace can't overwrite the hws! Imagine if we were using
> >> that for interrupt status reads, or seqno tracking...
> >
> > Yeah I'm thinking of an additional hws that's per-context and userspace
> > mappable.  It could come in handy for userspace only sync stuff.
> 
> Userspace can already do seqno writes with MI_FLUSH_DW or PIPE_CONTROL
> - lots of igt tests actually do that for correctness checks. So the
> only thing really is interrupts, and I think for that we really want
> the full request tracking machinery in the kernel (otherwise I fear
> we'll have even more fun with lost/spurious interrupts since the hw
> guys just seem to not be able to get that right). Which means a full
> batch split.
> 
> I have no idea how that's supposed to work when userspace does direct
> hardware submission. But that's kinda a good reason not to do that
> anyway, and at least for now it looks like direct hw submission is for
> opencl2 only with interop with other devices (where sync matters) not
> a use-case. For interop with other processes the gpu can always do a
> seqno write to some shared page. And busy-looping, but apparently
> that's what people want for low-latency. Or at least what designers
> seem to think people want ...

Yeah I haven't thought how direct submission will work in terms of
IPC.  It may just have to be done in userland with a custom cooperative
mechanism...

-- 
Jesse Barnes, Intel Open Source Technology Center

      reply	other threads:[~2014-09-03 19:48 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-02 21:32 Updated fence patches Jesse Barnes
2014-09-02 21:32 ` [PATCH 1/2] drm/i915: Android sync points for i915 v2 Jesse Barnes
2014-09-03  7:09   ` Chris Wilson
2014-09-03 16:41     ` Ville Syrjälä
2014-09-03 17:05       ` Chris Wilson
2014-09-03 17:12         ` Chris Wilson
2014-09-02 21:32 ` [PATCH 2/2] drm/i915: allow sync points within batches Jesse Barnes
2014-09-03  7:01   ` Chris Wilson
2014-09-03 15:41     ` Jesse Barnes
2014-09-03 16:08       ` Chris Wilson
2014-09-03 19:01         ` Jesse Barnes
2014-09-03 19:41           ` Daniel Vetter
2014-09-03 19:48             ` Jesse Barnes [this message]

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