From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: Enable full PPGTT on gen7 Date: Tue, 9 Sep 2014 15:34:59 +0300 Message-ID: <20140909123459.GE4193@intel.com> References: <1409922796-453-1-git-send-email-michel.thierry@intel.com> <20140909115711.GF19343@nuc-i3427.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id C9FF789F3C for ; Tue, 9 Sep 2014 05:35:02 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140909115711.GF19343@nuc-i3427.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson , Michel Thierry , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Sep 09, 2014 at 12:57:11PM +0100, Chris Wilson wrote: > On Fri, Sep 05, 2014 at 02:13:16PM +0100, Michel Thierry wrote: > > Use full PPGTT as the default option in gen7. > > Note that aliasing PPGTT is the default option for gen8 (see HAS_PPGTT). > > = > > This may well come back to bite me later. > = > Indeed. So something I spotted was that bspec mentions that the per-ring > PDE registers (RING_PP_DIR_DCLV and RING_PP_DIR_BASE) are stored in the > logical context and so the registers are restored along with the > context. If this is correct what happens when we switch logical contexts > on RCS whilst we have active work on BCS etc? Does this mean that we > have to serialise context switches across rings, or is my reading of the > bspec false? How does rcs PP_DIR_* affect bcs? Also IIRC that stuff is part of the execlist context which isn't saved/restored unless execlists are actually enabled. IIRC when I tried it, snb did reserve the space for that stuff in the context image but didn't save/restore it, but ivb+ didn't even reserve the space. -- = Ville Syrj=E4l=E4 Intel OTC