diff for duplicates of <20140910165211.19023.39726@quantum> diff --git a/a/1.txt b/N1/1.txt index 1ea6f0d..7889a37 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -Quoting ??? (2014-09-04 23:37:25) +Quoting 薛建成 (2014-09-04 23:37:25) > > > 2014-09-04 1:37 GMT+08:00 Mike Turquette <mturquette@linaro.org>: @@ -6,42 +6,42 @@ Quoting ??? (2014-09-04 23:37:25) > Quoting Zhangfei Gao (2014-08-25 22:46:07) > > +static int clk_ether_enable(struct clk_hw *hw) > > +{ -> > +? ? ? ?struct hix5hd2_clk_complex *clk = to_complex_clk(hw); -> > +? ? ? ?u32 val; +> > + struct hix5hd2_clk_complex *clk = to_complex_clk(hw); +> > + u32 val; > > + -> > +? ? ? ?val = readl_relaxed(clk->ctrl_reg); -> > +? ? ? ?val |= clk->ctrl_clk_mask | clk->ctrl_rst_mask; -> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg); -> > +? ? ? ?val &= ~(clk->ctrl_rst_mask); -> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg); +> > + val = readl_relaxed(clk->ctrl_reg); +> > + val |= clk->ctrl_clk_mask | clk->ctrl_rst_mask; +> > + writel_relaxed(val, clk->ctrl_reg); +> > + val &= ~(clk->ctrl_rst_mask); +> > + writel_relaxed(val, clk->ctrl_reg); > > + -> > +? ? ? ?val = readl_relaxed(clk->phy_reg); -> > +? ? ? ?val |= clk->phy_clk_mask; -> > +? ? ? ?val &= ~(clk->phy_rst_mask); -> > +? ? ? ?writel_relaxed(val, clk->phy_reg); -> > +? ? ? ?mdelay(10); +> > + val = readl_relaxed(clk->phy_reg); +> > + val |= clk->phy_clk_mask; +> > + val &= ~(clk->phy_rst_mask); +> > + writel_relaxed(val, clk->phy_reg); +> > + mdelay(10); > > + -> > +? ? ? ?val &= ~(clk->phy_clk_mask); -> > +? ? ? ?val |= clk->phy_rst_mask; -> > +? ? ? ?writel_relaxed(val, clk->phy_reg); -> > +? ? ? ?mdelay(10); +> > + val &= ~(clk->phy_clk_mask); +> > + val |= clk->phy_rst_mask; +> > + writel_relaxed(val, clk->phy_reg); +> > + mdelay(10); > > + -> > +? ? ? ?val |= clk->phy_clk_mask; -> > +? ? ? ?val &= ~(clk->phy_rst_mask); -> > +? ? ? ?writel_relaxed(val, clk->phy_reg); -> > +? ? ? ?mdelay(30); +> > + val |= clk->phy_clk_mask; +> > + val &= ~(clk->phy_rst_mask); +> > + writel_relaxed(val, clk->phy_reg); +> > + mdelay(30); > > With all of these mdelays, I wonder if you should use .prepare and > .unprepare instead? Does the Ethernet driver call clk_{en|dis}able from > interrupt context? > -> ? +> > Thank you for the advise. > -> In hix5hd2 soc, these mdelays are necessary for resetting the Ethernet ?phy +> In hix5hd2 soc, these mdelays are necessary for resetting the Ethernet phy > device. The hardware need some time to be stable.It's difficult to use .prepare > and .unprepare instead, because they are embeded in several places among the -> whole sequence. Even though some code segment could be put into ?the .prepare +> whole sequence. Even though some code segment could be put into the .prepare > callback, mdelays should still be reserved. So we hope to keep this manner if > it's ok. @@ -67,63 +67,63 @@ Regards, Mike > -> ? +> > -> > +? ? ? ?return 0; +> > + return 0; > > +} > > + > > +static void clk_ether_disable(struct clk_hw *hw) > > +{ -> > +? ? ? ?struct hix5hd2_clk_complex *clk = to_complex_clk(hw); -> > +? ? ? ?u32 val; +> > + struct hix5hd2_clk_complex *clk = to_complex_clk(hw); +> > + u32 val; > > + -> > +? ? ? ?val = readl_relaxed(clk->ctrl_reg); -> > +? ? ? ?val &= ~(clk->ctrl_clk_mask); -> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg); +> > + val = readl_relaxed(clk->ctrl_reg); +> > + val &= ~(clk->ctrl_clk_mask); +> > + writel_relaxed(val, clk->ctrl_reg); > > +} > > + > > +static struct clk_ops clk_ether_ops = { -> > +? ? ? ?.enable = clk_ether_enable, -> > +? ? ? ?.disable = clk_ether_disable, +> > + .enable = clk_ether_enable, +> > + .disable = clk_ether_disable, > > +}; > > + > > +static int clk_complex_enable(struct clk_hw *hw) > > +{ -> > +? ? ? ?struct hix5hd2_clk_complex *clk = to_complex_clk(hw); -> > +? ? ? ?u32 val; +> > + struct hix5hd2_clk_complex *clk = to_complex_clk(hw); +> > + u32 val; > > + -> > +? ? ? ?val = readl_relaxed(clk->ctrl_reg); -> > +? ? ? ?val |= clk->ctrl_clk_mask; -> > +? ? ? ?val &= ~(clk->ctrl_rst_mask); -> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg); +> > + val = readl_relaxed(clk->ctrl_reg); +> > + val |= clk->ctrl_clk_mask; +> > + val &= ~(clk->ctrl_rst_mask); +> > + writel_relaxed(val, clk->ctrl_reg); > > + -> > +? ? ? ?val = readl_relaxed(clk->phy_reg); -> > +? ? ? ?val |= clk->phy_clk_mask; -> > +? ? ? ?val &= ~(clk->phy_rst_mask); -> > +? ? ? ?writel_relaxed(val, clk->phy_reg); +> > + val = readl_relaxed(clk->phy_reg); +> > + val |= clk->phy_clk_mask; +> > + val &= ~(clk->phy_rst_mask); +> > + writel_relaxed(val, clk->phy_reg); > > + -> > +? ? ? ?return 0; +> > + return 0; > > +} > > + > > +static void clk_complex_disable(struct clk_hw *hw) > > +{ -> > +? ? ? ?struct hix5hd2_clk_complex *clk = to_complex_clk(hw); -> > +? ? ? ?u32 val; +> > + struct hix5hd2_clk_complex *clk = to_complex_clk(hw); +> > + u32 val; > > + -> > +? ? ? ?val = readl_relaxed(clk->ctrl_reg); -> > +? ? ? ?val |= clk->ctrl_rst_mask; -> > +? ? ? ?val &= ~(clk->ctrl_clk_mask); -> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg); +> > + val = readl_relaxed(clk->ctrl_reg); +> > + val |= clk->ctrl_rst_mask; +> > + val &= ~(clk->ctrl_clk_mask); +> > + writel_relaxed(val, clk->ctrl_reg); > > + -> > +? ? ? ?val = readl_relaxed(clk->phy_reg); -> > +? ? ? ?val |= clk->phy_rst_mask; -> > +? ? ? ?val &= ~(clk->phy_clk_mask); -> > +? ? ? ?writel_relaxed(val, clk->phy_reg); +> > + val = readl_relaxed(clk->phy_reg); +> > + val |= clk->phy_rst_mask; +> > + val &= ~(clk->phy_clk_mask); +> > + writel_relaxed(val, clk->phy_reg); > > +} > > + > > +static struct clk_ops clk_complex_ops = { -> > +? ? ? ?.enable = clk_complex_enable, -> > +? ? ? ?.disable = clk_complex_disable, +> > + .enable = clk_complex_enable, +> > + .disable = clk_complex_disable, > > +}; > > These enable/disable callbacks look good, with no delays. @@ -131,4 +131,9 @@ Mike > Regards, > Mike > -> +> + +_______________________________________________ +linux-arm-kernel mailing list +linux-arm-kernel@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N1/content_digest index 9e3f43c..7cb70b8 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,13 +2,20 @@ "ref\01409031970-4821-2-git-send-email-zhangfei.gao@linaro.org\0" "ref\020140903173753.11368.10916@quantum\0" "ref\0CABHwWpQRj1YepkszoiiH0_vAp_-mS8qSwrEiLNkRoKvUUt7uxg@mail.gmail.com\0" - "From\0mturquette@linaro.org (Mike Turquette)\0" - "Subject\0[PATCH resend 1/4] clk: hix5hd2: add complex clk\0" + "From\0Mike Turquette <mturquette@linaro.org>\0" + "Subject\0Re: [PATCH resend 1/4] clk: hix5hd2: add complex clk\0" "Date\0Wed, 10 Sep 2014 09:52:11 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0\350\226\233\345\273\272\346\210\220 <jchxue@gmail.com>\0" + "Cc\0devicetree@vger.kernel.org" + haifeng.yan@linaro.org + xuwei5@hisilicon.com + Haojian Zhuang <haojian.zhuang@linaro.org> + Jiancheng Xue <xuejiancheng@huawei.com> + Zhangfei Gao <zhangfei.gao@linaro.org> + " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "Quoting ??? (2014-09-04 23:37:25)\n" + "Quoting \350\226\233\345\273\272\346\210\220 (2014-09-04 23:37:25)\n" "> \n" "> \n" "> 2014-09-04 1:37 GMT+08:00 Mike Turquette <mturquette@linaro.org>:\n" @@ -16,42 +23,42 @@ "> Quoting Zhangfei Gao (2014-08-25 22:46:07)\n" "> > +static int clk_ether_enable(struct clk_hw *hw)\n" "> > +{\n" - "> > +? ? ? ?struct hix5hd2_clk_complex *clk = to_complex_clk(hw);\n" - "> > +? ? ? ?u32 val;\n" + "> > +\302\240 \302\240 \302\240 \302\240struct hix5hd2_clk_complex *clk = to_complex_clk(hw);\n" + "> > +\302\240 \302\240 \302\240 \302\240u32 val;\n" "> > +\n" - "> > +? ? ? ?val = readl_relaxed(clk->ctrl_reg);\n" - "> > +? ? ? ?val |= clk->ctrl_clk_mask | clk->ctrl_rst_mask;\n" - "> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg);\n" - "> > +? ? ? ?val &= ~(clk->ctrl_rst_mask);\n" - "> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val = readl_relaxed(clk->ctrl_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val |= clk->ctrl_clk_mask | clk->ctrl_rst_mask;\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->ctrl_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val &= ~(clk->ctrl_rst_mask);\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->ctrl_reg);\n" "> > +\n" - "> > +? ? ? ?val = readl_relaxed(clk->phy_reg);\n" - "> > +? ? ? ?val |= clk->phy_clk_mask;\n" - "> > +? ? ? ?val &= ~(clk->phy_rst_mask);\n" - "> > +? ? ? ?writel_relaxed(val, clk->phy_reg);\n" - "> > +? ? ? ?mdelay(10);\n" + "> > +\302\240 \302\240 \302\240 \302\240val = readl_relaxed(clk->phy_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val |= clk->phy_clk_mask;\n" + "> > +\302\240 \302\240 \302\240 \302\240val &= ~(clk->phy_rst_mask);\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->phy_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240mdelay(10);\n" "> > +\n" - "> > +? ? ? ?val &= ~(clk->phy_clk_mask);\n" - "> > +? ? ? ?val |= clk->phy_rst_mask;\n" - "> > +? ? ? ?writel_relaxed(val, clk->phy_reg);\n" - "> > +? ? ? ?mdelay(10);\n" + "> > +\302\240 \302\240 \302\240 \302\240val &= ~(clk->phy_clk_mask);\n" + "> > +\302\240 \302\240 \302\240 \302\240val |= clk->phy_rst_mask;\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->phy_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240mdelay(10);\n" "> > +\n" - "> > +? ? ? ?val |= clk->phy_clk_mask;\n" - "> > +? ? ? ?val &= ~(clk->phy_rst_mask);\n" - "> > +? ? ? ?writel_relaxed(val, clk->phy_reg);\n" - "> > +? ? ? ?mdelay(30);\n" + "> > +\302\240 \302\240 \302\240 \302\240val |= clk->phy_clk_mask;\n" + "> > +\302\240 \302\240 \302\240 \302\240val &= ~(clk->phy_rst_mask);\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->phy_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240mdelay(30);\n" "> \n" "> With all of these mdelays, I wonder if you should use .prepare and\n" "> .unprepare instead? Does the Ethernet driver call clk_{en|dis}able from\n" "> interrupt context?\n" "> \n" - "> ?\n" + "> \302\240\n" "> Thank you for the advise.\n" "> \n" - "> In hix5hd2 soc, these mdelays are necessary for resetting the Ethernet ?phy\n" + "> In hix5hd2 soc, these mdelays are necessary for resetting the Ethernet \302\240phy\n" "> device. The hardware need some time to be stable.It's difficult to use .prepare\n" "> and .unprepare instead, because they are embeded in several places among the\n" - "> whole sequence. Even though some code segment could be put into ?the .prepare\n" + "> whole sequence. Even though some code segment could be put into \302\240the .prepare\n" "> callback, mdelays should still be reserved. So we hope to keep this manner if\n" "> it's ok.\n" "\n" @@ -77,63 +84,63 @@ "Mike\n" "\n" "> \n" - "> ?\n" + "> \302\240\n" "> \n" - "> > +? ? ? ?return 0;\n" + "> > +\302\240 \302\240 \302\240 \302\240return 0;\n" "> > +}\n" "> > +\n" "> > +static void clk_ether_disable(struct clk_hw *hw)\n" "> > +{\n" - "> > +? ? ? ?struct hix5hd2_clk_complex *clk = to_complex_clk(hw);\n" - "> > +? ? ? ?u32 val;\n" + "> > +\302\240 \302\240 \302\240 \302\240struct hix5hd2_clk_complex *clk = to_complex_clk(hw);\n" + "> > +\302\240 \302\240 \302\240 \302\240u32 val;\n" "> > +\n" - "> > +? ? ? ?val = readl_relaxed(clk->ctrl_reg);\n" - "> > +? ? ? ?val &= ~(clk->ctrl_clk_mask);\n" - "> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val = readl_relaxed(clk->ctrl_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val &= ~(clk->ctrl_clk_mask);\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->ctrl_reg);\n" "> > +}\n" "> > +\n" "> > +static struct clk_ops clk_ether_ops = {\n" - "> > +? ? ? ?.enable = clk_ether_enable,\n" - "> > +? ? ? ?.disable = clk_ether_disable,\n" + "> > +\302\240 \302\240 \302\240 \302\240.enable = clk_ether_enable,\n" + "> > +\302\240 \302\240 \302\240 \302\240.disable = clk_ether_disable,\n" "> > +};\n" "> > +\n" "> > +static int clk_complex_enable(struct clk_hw *hw)\n" "> > +{\n" - "> > +? ? ? ?struct hix5hd2_clk_complex *clk = to_complex_clk(hw);\n" - "> > +? ? ? ?u32 val;\n" + "> > +\302\240 \302\240 \302\240 \302\240struct hix5hd2_clk_complex *clk = to_complex_clk(hw);\n" + "> > +\302\240 \302\240 \302\240 \302\240u32 val;\n" "> > +\n" - "> > +? ? ? ?val = readl_relaxed(clk->ctrl_reg);\n" - "> > +? ? ? ?val |= clk->ctrl_clk_mask;\n" - "> > +? ? ? ?val &= ~(clk->ctrl_rst_mask);\n" - "> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val = readl_relaxed(clk->ctrl_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val |= clk->ctrl_clk_mask;\n" + "> > +\302\240 \302\240 \302\240 \302\240val &= ~(clk->ctrl_rst_mask);\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->ctrl_reg);\n" "> > +\n" - "> > +? ? ? ?val = readl_relaxed(clk->phy_reg);\n" - "> > +? ? ? ?val |= clk->phy_clk_mask;\n" - "> > +? ? ? ?val &= ~(clk->phy_rst_mask);\n" - "> > +? ? ? ?writel_relaxed(val, clk->phy_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val = readl_relaxed(clk->phy_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val |= clk->phy_clk_mask;\n" + "> > +\302\240 \302\240 \302\240 \302\240val &= ~(clk->phy_rst_mask);\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->phy_reg);\n" "> > +\n" - "> > +? ? ? ?return 0;\n" + "> > +\302\240 \302\240 \302\240 \302\240return 0;\n" "> > +}\n" "> > +\n" "> > +static void clk_complex_disable(struct clk_hw *hw)\n" "> > +{\n" - "> > +? ? ? ?struct hix5hd2_clk_complex *clk = to_complex_clk(hw);\n" - "> > +? ? ? ?u32 val;\n" + "> > +\302\240 \302\240 \302\240 \302\240struct hix5hd2_clk_complex *clk = to_complex_clk(hw);\n" + "> > +\302\240 \302\240 \302\240 \302\240u32 val;\n" "> > +\n" - "> > +? ? ? ?val = readl_relaxed(clk->ctrl_reg);\n" - "> > +? ? ? ?val |= clk->ctrl_rst_mask;\n" - "> > +? ? ? ?val &= ~(clk->ctrl_clk_mask);\n" - "> > +? ? ? ?writel_relaxed(val, clk->ctrl_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val = readl_relaxed(clk->ctrl_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val |= clk->ctrl_rst_mask;\n" + "> > +\302\240 \302\240 \302\240 \302\240val &= ~(clk->ctrl_clk_mask);\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->ctrl_reg);\n" "> > +\n" - "> > +? ? ? ?val = readl_relaxed(clk->phy_reg);\n" - "> > +? ? ? ?val |= clk->phy_rst_mask;\n" - "> > +? ? ? ?val &= ~(clk->phy_clk_mask);\n" - "> > +? ? ? ?writel_relaxed(val, clk->phy_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val = readl_relaxed(clk->phy_reg);\n" + "> > +\302\240 \302\240 \302\240 \302\240val |= clk->phy_rst_mask;\n" + "> > +\302\240 \302\240 \302\240 \302\240val &= ~(clk->phy_clk_mask);\n" + "> > +\302\240 \302\240 \302\240 \302\240writel_relaxed(val, clk->phy_reg);\n" "> > +}\n" "> > +\n" "> > +static struct clk_ops clk_complex_ops = {\n" - "> > +? ? ? ?.enable = clk_complex_enable,\n" - "> > +? ? ? ?.disable = clk_complex_disable,\n" + "> > +\302\240 \302\240 \302\240 \302\240.enable = clk_complex_enable,\n" + "> > +\302\240 \302\240 \302\240 \302\240.disable = clk_complex_disable,\n" "> > +};\n" "> \n" "> These enable/disable callbacks look good, with no delays.\n" @@ -141,6 +148,11 @@ "> Regards,\n" "> Mike\n" "> \n" - > + "> \n" + "\n" + "_______________________________________________\n" + "linux-arm-kernel mailing list\n" + "linux-arm-kernel@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -0a2205a65e6de3c9ae86a887dd7b24dfcc65043eeb830c9ed0efcc6db5f9bc38 +5242ed7847ae4705e0fe2b8d79d7095a3e67a8d64e6e67b9df2cfbb3d586be59
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